Thermal simulation and measurement of SiC MOSETs

Kim, Jung Kyun

doi:10.1109/eptc47984.2019.9026682

Cited by 10 publications

(1 citation statement)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The Z value at the separation point of the two curves is close to the device steady-state R θJC [22]. This method avoids the errors caused by traditional thermocouple methods [27], and has been widely used for Si [28], [29], SiC [30], and GaN [31] devices. In the TDIM method, the junction temperature (T j ) is usually monitored by continuously measuring a thermo-sensitive electrical parameter (TSEP) [32].…”

Section: Thermal Resistance Measurementsmentioning

confidence: 99%

Low Thermal Resistance (0.5 K/W) Ga₂O₃ Schottky Rectifiers With Double-Side Packaging

Wang

Xiao

Knoll

et al. 2021

IEEE Electron Device Lett.

View full text Add to dashboard Cite

The low thermal conductivity of Ga 2 O 3 has arguably been the most serious concern for Ga 2 O 3 power and RF devices. Despite many simulation studies, there is no experimental report on the thermal resistance of a large-area, packaged Ga 2 O 3 device. This work fills this gap by demonstrating a 15-A double-side packaged Ga 2 O 3 Schottky barrier diode (SBD) and measuring its junctionto-case thermal resistance (R θJC ) in the bottom-side-and junction-side-cooling configurations. The R θJC characterization is based on the transient dual interface method, i.e., JEDEC 51-14 standard. The R θJC of the junction-and bottom-cooled Ga 2 O 3 SBD was measured to be 0.5 K/W and 1.43 K/W, respectively, with the former R θJC lower than that of similarly-rated commercial SiC SBDs. This low R θJC is attributable to the heat extraction directly from the Schottky junction instead of through the Ga 2 O 3 chip. The R θJC lower than that of commercial SiC devices proves the viability of Ga 2 O 3 devices for high-power applications and manifest the significance of proper packaging for their thermal management.

show abstract

Section: Thermal Resistance Measurementsmentioning

confidence: 99%

Low Thermal Resistance (0.5 K/W) Ga₂O₃ Schottky Rectifiers With Double-Side Packaging

Wang

Xiao

Knoll

et al. 2021

IEEE Electron Device Lett.

View full text Add to dashboard Cite

show abstract

Extremely Low Thermal Resistance of β-Ga₂O₃ MOSFETs by Co-integrated Design of Substrate Engineering and Device Packaging

Qu,

Xie,

Zhao

et al. 2024

ACS Appl. Mater. Interfaces

View full text Add to dashboard Cite

Gallium oxide (Ga2O3) emerges as a promising ultrawide bandgap semiconductor, which is expected to surpass the performance of current wide bandgap materials, like GaN and SiC, in electronic devices. However, widespread application of Ga2O3 is hindered by its extremely low thermal conductivity and lack of effective device-level thermal management strategies. In this work, Ga2O3 metal–oxide–semiconductor field-effect transistors (MOSFETs) are fabricated by conducting co-integrated design of substrate engineering with layer transferring and device packaging. 3D Raman thermography is introduced as a novel method to analyze the temperature distribution within the device, which provides valuable insights into their thermal performances. A high-quality Ga2O3-SiC heterogeneous integrated material is successfully fabricated with an extremely low interface thermal resistance of 6.67 ± 2 m2·K/GW. Compared to the homoepitaxial Ga2O3 MOSFETs, the degradation of I on/I off in Ga2O3-SiC MOSFETs is decreased by 1.5 orders of magnitude, and that of R on is decreased by 31%, showing the great thermal stability of Ga2O3-SiC MOSFETs. With the additional device packaging, a significant one order-of-magnitude reduction in the thermal resistance of the Ga2O3-SiC MOSFET is achieved, reaching a record-low value of 4.45 K·mm/W in the reported Ga2O3 MOSFETs. This work demonstrates an efficient strategy for device-level thermal management in next-generation Ga2O3 power and RF applications.

show abstract

Design and Implementation of High-Speed Serial Transmission for ADC Based on JESD204B

Huang,

Tian,

Zhang

et al. 2023

2023 IEEE 3rd International Conference on Intelligent Technology and Embedded Systems (ICITES)

View full text Add to dashboard Cite

Thermal simulation and measurement of SiC MOSETs

Cited by 10 publications

References 8 publications

Low Thermal Resistance (0.5 K/W) Ga₂O₃ Schottky Rectifiers With Double-Side Packaging

Low Thermal Resistance (0.5 K/W) Ga₂O₃ Schottky Rectifiers With Double-Side Packaging

Extremely Low Thermal Resistance of β-Ga₂O₃ MOSFETs by Co-integrated Design of Substrate Engineering and Device Packaging

Design and Implementation of High-Speed Serial Transmission for ADC Based on JESD204B

Contact Info

Product

Resources

About

Thermal simulation and measurement of SiC MOSETs

Cited by 10 publications

References 8 publications

Low Thermal Resistance (0.5 K/W) Ga₂O₃ Schottky Rectifiers With Double-Side Packaging

Low Thermal Resistance (0.5 K/W) Ga₂O₃ Schottky Rectifiers With Double-Side Packaging

Extremely Low Thermal Resistance of β-Ga2O3 MOSFETs by Co-integrated Design of Substrate Engineering and Device Packaging

Design and Implementation of High-Speed Serial Transmission for ADC Based on JESD204B

Contact Info

Product

Resources

About

Extremely Low Thermal Resistance of β-Ga₂O₃ MOSFETs by Co-integrated Design of Substrate Engineering and Device Packaging