Thickness-dependent stress effect in p-type metal–oxide–semiconductor structure investigated by substrate injection current

Abstract

The effects of oxide, Si wafer, and gate Al thicknesses on the substrate injection currents (J sub) of p-type metal-oxide-semiconductor structures with ultrathin oxides are studied. J sub is reported to be both trap-related ͑interface and Si bulk͒ and Si band gap-related ͑intrinsic carrier concentration͒. Both mechanisms have given rise to the stress near the Si/SiO 2 interface. Current-voltage and capacitance-voltage characterizations reveal that J sub increases with oxide thickness, which is suggested to be dominated by the trap-related mechanism. A stronger dependence of J sub on a change in oxide thickness is observed for a thicker Si wafer, which is proposed to be mainly caused by the band gap-related mechanism. Furthermore, a thicker gate Al introduces a higher J sub , which is proposed to be due to both the trap-related and the band gap-related mechanisms.

Quantum confinement in Si and Ge nanostructures

“…[57] Tensile stress can be relieved depending on the nature of the interface bonds and the surface to volume ratio of Si:SiO 2 . [52] In the work of Ref. 17 it was found from Raman spectroscopy that ion-implanted QDs are not under stress for diameters smaller than 3 nm.…”

“…To verify this claim, the authors measure a 2% extension in the bond length using x-ray diffraction. Thus, the QDs are under tensile stress, which increases the E G [52], see below for more detail. Finally, Furukawa et al explain that the origin of the stress is through the incorporation of the above mentioned H in the Si QD lattice through a plasma-assisted crystallization process.…”

“…[54] Tensile stress, which is a function of the thickness of oxide, is known to increase the band gap. [52] It is known that the surrounding oxide has a strong effect on the resulting PL in por-Si. [55] The resulting Si-O-Si bonds due to the oxidation process place large stresses on the por-Si crystallites.…”

Quantum confinement in Si and Ge nanostructures: Theory and experiment

“…A thick oxide layer is known to increase E G by increasing the stress in the system. 284 Thus, if one takes caution to remove the oxide layer, then QC PL should be observed. In the work of Ref.…”

Thickness dependence of structural and electrical characteristics of ZrO2 thin films as grown on Si by chemical-vapor deposition

“…A saturation of leakage current was found for positive gate bias larger than 1 V. This was attributed to small amounts of minority carriers ͑i.e., electrons͒ in the depletion region. 34 As shown in the inserted figure, the leakage current changes from positive to negative at the gate voltage of ϩ0.2 and ϩ0.1 V for films having a thickness of 10 and 6.0 nm, respectively, when sweeping the gate voltage from inversion to accumulation. However, such a turnaround voltage is rarely observed from ultrathin films with thickness р3.2 nm.…”