Thin Film Logic Circuits with Amorphous SiInZnO Channel Layer Annealed at Different Atmospheres for Next‐Generation Integrated Circuits

Abstract

In this study, amorphous-oxide-based thin film logic circuits are fabricated using only an n-type silicon-indium-zinc-oxide (a-SIZO) active channel layer annealed at different atmospheres (N 2 or air). More carriers are present in the N 2 atmosphere than in the air because the number of oxygen vacancies (V O ) formed is higher. The inverters (NOT logic circuits) are simply fabricated by adopting different V th , adjusted by using different annealing atmospheres. The inverters have high voltage gain values of 11.64 and 9.99 at V DD ¼ 5 V. A higher gain is obtained when the thin film transistor annealed in N 2 is used in the enhancement mode. The reason for this is closely related to the subthreshold slope value. Furthermore, more complex n-type-based NAND and NOR thin-film circuits are fabricated by simply adopting different annealing atmospheres, and are confirmed to operate like the logic gates. This simple fabrication method of thin-film logic circuits can open up the possibility for the implementation of next-generation integrated circuits. Experimental SectionA staggered bottom-gate structure was used for the TFT structure, and a p-type silicon wafer with 200-nm SiO 2 (resistivity ¼ 0.001-0.002 Ω cm À1 ) was used as the substrate.