Thin‐Film Transistors for Integrated Circuits: Fundamentals and Recent Progress

Abstract

High‐performance thin‐film transistors (TFTs) integrated circuits (ICs) have become increasingly necessary to meet the emerging demands such as healthcare, edge computing, and the Internet of Things, etc. This article aims to point out the potential development trends and bottlenecks of TFT ICs, enhancing their performance in terms of electronic performance, stability, consistency, CMOS design, and manufacturing capability. Basic device structures and overall metrics of TFT ICs are explored, as well as their superiority compared to silicon‐based ultrathin chips. Hydrogenated amorphous silicon, low‐temperature polycrystalline silicon, and amorphous oxide semiconductors are widely used in displays due to their ability to be deposited on large areas at low processing temperatures and low cost, and are validated in many prototypes for TFT ICs. Their conduction mechanisms, process flows, performance evaluation, and recent advances are comprehensively viewed. In addition, the potential of emerging low‐dimensional materials as next‐generation channel materials is discussed, along with their limitations and progress in this field. Finally, the major challenges in manufacturing high‐performance TFT ICs and future perspectives are summarized.

Uniform Oxide Layer Integration in Amorphous IGZO Thin Film Transistors for Enhanced Multilevel-Cell NAND Memory Performance

“…This process effectively secures and retains positive charges within the layer. In contrast, the intrinsic properties of a-IGZO as an n-type semiconductor complicate the dynamics of charge under negative bias; the depletion of the channel obstructs the conversion of the a-IGZO channel to the p-type [24]. Nevertheless, the reduced barrier height under such conditions still facilitates electron movement from the charge storage layer back to the IGZO channel via F-N tunneling, thus preserving the memory device's capacity for maintaining positive charge storage amidst adverse biasing scenarios.…”

The impact of thickness-related grain boundary migration on hole concentration and mobility of p-type transparent conducting CuI films

“… 30,44,45 However, as devices move toward higher integration, the demand for thinner channel layers in TFTs increases. 46 The non-uniformity of doping causes significant variations in local electrical properties in ultra-thin films, severely impacting device performance. 47,48 Therefore, intrinsic p-type semiconductors exhibit clear advantages in low-dimensional applications.…”

Stable chalcogenide Ge–Sb–Te heterostructures with minimal Ge segregation

“…Nowadays, the growing demand for embedded electronic devices able to share, process and store huge amounts of data within the Internet of Things (IoT) 1 is pushing the research institutions and the semiconductor industry to develop new technical solutions to realize cheaper connected electronic devices with both stiff and flexible materials 2 – 5 . Chalcogenide phase change memory (PCM) alloys are extensively used within the IoT environment to realize non-volatile memories 6 thanks to their capability to switch, upon the application of electrical stimuli, between two distinct structural solid-states phases (i.e., crystalline and amorphous) 7 .…”