Three-dimensional simulation of layer deposition

Bär, E.; Lorenz, J.; Ryssel, H.

doi:10.1016/s0026-2692(97)00094-3

Cited by 5 publications

(2 citation statements)

References 13 publications

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“…The capabilities for simulation of etching and deposition processes in these tools is mostly limited to 2-D and/or simple solid modeling approaches to create the input geometries for 3-D device simulation, e.g., by extruding 2-D geometries to 3-D. Programs for simulation of etching and deposition in three dimensions are available from commercial [17] and some academic sources, e.g., [21]- [23]. For the treatment of variations resulting from lithography, etching, or deposition steps, such tools must be employed and linked with equipment simulation to be able to trace the effect of variations, which are caused by process equipment, on device geometries.…”

Section: Process Simulationmentioning

confidence: 99%

Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology

Lorenz

Bär

Clees

et al. 2011

IEEE Trans. Electron Devices

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Abstract-Process variations increasingly challenge the manufacturability of advanced devices and the yield of integrated circuits. Technology computer-aided design (TCAD) has the potential to make key contributions to minimize this problem, by assessing the impact of certain variations on the device, circuit, and system. In this way, TCAD can provide the information necessary to decide on investments in the processing level or the adoption of a more variation tolerant process flow, device architecture, or design on circuit or chip level. In this first of two consecutive papers, sources of process variations and the state of the art of related simulation tools are reviewed. An approach for hierarchical simulation of process variations including their correlations is presented. The second paper, also published in this issue, presents examples of simulation results obtained with this methodology.

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Section: Process Simulationmentioning

confidence: 99%

Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology

Lorenz

Bär

Clees

et al. 2011

IEEE Trans. Electron Devices

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“…We have successfully used triangulated surfaces for the 3D simulation of deposition steps [3]. In that implementation, adaptive mesh refinement was necessary and done at convex corners.…”

Section: Topography Simulation Using Triangulated Surfacesmentioning

confidence: 99%

Adaptive Surface Triangulations for 3D Process Simulation

Nguyen

Burenkov

Lorenz

2004

Simulation of Semiconductor Processes and Devices 2004

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We present an enhanced smoothing algorithm in order to minimize the number of nodes in a surface triangulation while at the same time the wafer topography is maintained, and changes of geometry are limited to user-defined tolerances. Refined criteria for the protection of nodes and edges which have not to be removed because of topological reasons have been worked out. An algorithm has been implemented for the extraction of local smoothing tolerance. The use of local and material-dependent smoothing tolerance is mandatory for the optimization of surface triangulations. Our topologically correct smoothing algorithms with user-controlled tolerances provides large opportunities for increased efficiency of 3D simulation of various process steps. Some examples for this application are given.

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3D Simulation of Process Effects Limiting FinFET Performance and Scalability

Burenkov

Lorenz

2004

Simulation of Semiconductor Processes and Devices 2004

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Three-dimensional simulation of layer deposition

Cited by 5 publications

References 13 publications

Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology

Hierarchical Simulation of Process Variations and Their Impact on Circuits and Systems: Methodology

Adaptive Surface Triangulations for 3D Process Simulation

3D Simulation of Process Effects Limiting FinFET Performance and Scalability

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