2019
DOI: 10.1016/j.ifacol.2019.12.647
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Three-level NPC Inverter SVM Implementation on Delfino DSC

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Cited by 2 publications
(4 citation statements)
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“…The novel approach of the switch count reduction method requires a custom implementation. The method was implemented on a TMS320F28379D digital signal controller [6].…”
Section: Highlights Of the Hardware Implementationmentioning
confidence: 99%
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“…The novel approach of the switch count reduction method requires a custom implementation. The method was implemented on a TMS320F28379D digital signal controller [6].…”
Section: Highlights Of the Hardware Implementationmentioning
confidence: 99%
“…The sampling period of the SVM was set to T C = 500 µs (2 kHz sampling frequency) in this research. The temporal resolution t r = 1 µs was chosen, as it was found to be the smallest practical amount of time in which twelve PWM outputs of TMS320F28379D DSC can be arbitrarily set and synchronized together [6]. As a result, every calculated switching time is rounded to 1 µs.…”
Section: Temporal Resolution Timing and Dead-band Timementioning
confidence: 99%
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