2021
DOI: 10.1109/ted.2021.3121348
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Threshold Selector and Capacitive Coupled Assist Techniques for Write Voltage Reduction in Metal–Ferroelectric–Metal Field-Effect Transistor

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Cited by 4 publications
(1 citation statement)
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“…The write operation in these bitcells are accomplished by applying a voltage at the gate, and the voltage across the ferroelectric capacitor is an indication of the bitcell content. In the case of read, a read disturb voltage is applied on the top terminal of the ferroelectric capacitor, causing a voltage division, thereby enabling a higher voltage at the gate of the MOSFET, thereby implying a higher current through the FET which would imply '1' and '0' if the current through the MOSFET is lower [35][36][37].…”
Section: Ferroelectric Field Effect Transistor (Fefet)mentioning
confidence: 99%
“…The write operation in these bitcells are accomplished by applying a voltage at the gate, and the voltage across the ferroelectric capacitor is an indication of the bitcell content. In the case of read, a read disturb voltage is applied on the top terminal of the ferroelectric capacitor, causing a voltage division, thereby enabling a higher voltage at the gate of the MOSFET, thereby implying a higher current through the FET which would imply '1' and '0' if the current through the MOSFET is lower [35][36][37].…”
Section: Ferroelectric Field Effect Transistor (Fefet)mentioning
confidence: 99%