Time-Domain Computing in Memory Using Spintronics for Energy-Efficient Convolutional Neural Network

Zhang, Yue; Wang, Jinkai; Lian, Chenyu; Bai, Yining; Wang, Guanda; Zhang, Zhizhong; Zheng, Zhichao; Chen, Lei; Zhang, Kun; Zhang, Youguang

doi:10.1109/tcsi.2021.3055830

Cited by 51 publications

(13 citation statements)

References 37 publications

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“…Although such architectures present excellent energyefficiency, the analog nature of computing introduces errors and approximations, which limits their use to error-tolerant applications only [139]. Moreover, the large area and power overhead of ADCs further limits the use of analog computing to low-precision architectures [140], [141].…”

Section: Discussionmentioning

confidence: 99%

Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays

Agrawal

Wang

Sharma

et al. 2021

IEEE Trans. Circuits Syst. I

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This overview article describes Magnetoresistive Random Access Memory (MRAM) from a circuits and systems perspective. We discuss various tradeoffs and design challenges of MRAM in three broad application areas: 1) embedded nonvolatile memory (eNVMs), 2) crossbar-based analog in-memory computing, and 3) stochastic computing. Certain MRAM characteristics, such as high retention, high endurance and fast read and write operations, make them ideal for replacing the standard CMOS memories for last-level cache applications with future scaling. However, various tradeoffs in power, performance and area pose conflicting requirements on MRAM design. We explore these challenges and various circuit techniques that have been developed to mitigate them. Further, we present various requirements of memristive crossbar arrays for accelerating matrixvector-multiplication (MVM) operations in light of MRAM devices, and highlight various challenges, design considerations, and applicability of MRAM as crossbar arrays. Finally, we will elaborate on how inherent stochasticity of MRAM devices can be leveraged for implementing energy-efficient true random number generators (TRNGs) and stochastic units for performing certain tasks, such as developing fast solvers for combinatorial optimization, and stochastic neural networks.

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Section: Discussionmentioning

confidence: 99%

Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays

Agrawal

Wang

Sharma

et al. 2021

IEEE Trans. Circuits Syst. I

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“…In precharge phase, the output nodes SU M, SU M, C out , and C out precharge to logic '1'. In evaluation phase, the transistor MN1 of both the sum and carry circuits is ON and output is determined according to the (10) and (11). (11) The "SU M" and "C out " and their dependence on resistance configuration of CMOS logic tree and MTJ pair are shown in Table 3.…”

Section: Full Addermentioning

confidence: 99%

“…It demonstrates great potential in the post-Moore era. Owing to its large density, reliability, and low power dissipation, spintronic memory has attracted a great attention in applications such as memory [3], [4], logic [5], in-memory computing [6], [7], data encryption [8], approximate computing [9], [10], and neuromorphic computing [11], [12]. Spin transfer torque magnetic random-access memory (STT-MRAM) and spin orbit torque MRAM (SOT-MRAM) are seen as a promising replacement for the CMOS based on-chip memories [13].…”

Section: Introductionmentioning

confidence: 99%

Hybrid Spintronics/CMOS Logic Circuits Using All-Optical-Enabled Magnetic Tunnel Junction

Dikshit

Nisar

Dhull

et al. 2022

IEEE Open J. Nanotechnol.

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Spintronics is one of the emerging fields for next-generation low power, high endurance, nonvolatile, and area efficient memory technology. Spin torque transfer (STT), spin orbit torque (SOT), and electric field assisted switching mechanisms have been used to switch magnetization in various spintronic devices. However, their operation speed is fundamentally limited by the spin precession time that typically ranges in 10-400 ps. Such a time constraint severely limits the possible operation of these devices in highspeed systems. Optical switching using ultrashort laser pulses, on the other hand, is able to achieve subpicosecond switching operation in magnetic tunnel junctions (MTJs). In this paper, all optically switched (AOS) MTJ has been used to design high speed and low power hybrid MTJ/CMOS based logic circuits such as AND/NAND, XOR/XNOR, and full adder. Owing to the ultra-fast switching operation of AOS-MTJ, the circuit level results show that the energy and speed of AOS-MTJ based logic circuits are improved by 85% and 97%, respectively, when compared to STT based circuits. In comparison to SOT based designs, the proposed logic circuits show 10% and 91% improvement in energy efficiency and speed, respectively.

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“…Spintronic devices present advantages for the integration since they are compatible with CMOS and the same technology can be used to implement both artificial neurons and synapses [22,23]. Research shows that arrays of spintronic memories are promising for associative memories [24], spiking neural networks [25] and convolutional neural networks with time-domain computing [26]. However, implementing in parallel all the multiply-and-accumulate operations of a convolution requires extremely large crossbar arrays.…”

Section: Introductionmentioning

confidence: 99%

Convolutional neural networks with radio-frequency spintronic nano-devices

Leroux

Riz

Sanz-Hernández

et al. 2022

Neuromorph. Comput. Eng.

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Convolutional neural networks [1,2] are state-of-the-art and ubiquitous in modern signal processing and machine vision. Nowadays, hardware solutions based on emerging nanodevices are designed to reduce the power consumption of these networks. This is done either by using devices that implement convolutional filters and sequentially multiply consecutive subsets of the input, or by using different sets of devices to perform the different multiplications in parallel to avoid storing intermediate computational steps in memory. Spintronics devices are promising for information processing because of the various neural and synaptic functionalities they offer. However, due to their low OFF/ON ratio, performing all the multiplications required for convolutions in a single step with a crossbar array of spintronic memories would cause sneak-path currents. Here we present an architecture where synaptic communications are based on a resonance effect. These synaptic communications thus have a frequency selectivity that prevents crosstalk caused by sneak-path currents. We first demonstrate how a chain of spintronic resonators can function as synapses and make convolutions by sequentially rectifying radio-frequency signals encoding consecutive sets of inputs. We show that a parallel implementation is possible with multiple chains of spintronic resonators. We propose two different spatial arrangements for these chains. For each of them, we explain how to tune many artificial synapses simultaneously, exploiting the synaptic weight sharing specific to convolutions. We show how information can be transmitted between convolutional layers by using spintronic oscillators as artificial microwave neurons. Finally, we simulate a network of these radio-frequency resonators and spintronic oscillators to solve the MNIST handwritten digits dataset, and obtain results comparable to software convolutional neural networks. Since it can run convolutional neural networks fully in parallel in a single step with nano devices, the architecture proposed in this paper is promising for embedded applications requiring machine vision, such as autonomous driving.

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Time-Domain Computing in Memory Using Spintronics for Energy-Efficient Convolutional Neural Network

Cited by 51 publications

References 37 publications

Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays

Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays

Hybrid Spintronics/CMOS Logic Circuits Using All-Optical-Enabled Magnetic Tunnel Junction

Convolutional neural networks with radio-frequency spintronic nano-devices

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