Time-domain performance bound analysis for analog and interconnect circuits considering process variations

Exploiting bounds optimization for the semi-formal verification of analog circuits

“…Compared with the methods in [33] and [34] that also employed nonlinear constrained optimization to compute transient performance bounds of analog circuits under process variations, the approach we proposed in this paper has several advantages. Using different approximation methods, the authors in [33] compute the derivations of the linearized analog circuit models and derive the bound of the circuit response in transient domain.…”

“…Using different approximation methods, the authors in [33] compute the derivations of the linearized analog circuit models and derive the bound of the circuit response in transient domain. Also in [34], a symbolic MNA formulation is applied on a linearized analog circuit model. Then, time domain performance response bounds are computed.…”

“…Furthermore, the proposed methods do not consider the sensitivity of their bound analysis to the initial condition. Moreover, the work in [33] and [34] consider the optimization solution for each time step as the stating point of the next time step to speedup the bound analysis at the cost of the accuracy. In contrast, our method directly handles device-level nonlinear models of analog circuits and considers a complete possible set of initial conditions.…”