In this work we will introduce a general analysis of time jitter in Sigma-Delta synthesizer. One of the practical applications of I-bit Sigma-Delta systems is a generation of high-resolution local oscillator (LO). LO signals in transmit / receive circuits are typically generated using synthesizers, direct-digital synthesis (DDS), etc. In order to generate LO signals, one may use a single-bit SigmaDelta technique to encode sine waves. Due to hardware constraints, Sigma-Delta output is generally injected into a frequency multiplier system in order to generate a high frequency LO signals. Today, direct generation o f high frequency sinewave using a clock with higher frequency i s possible. In this letter we will analyze these different techniques and develop some robust tools that will help us to create a practical way of computation to decide how to choose the best configuration under minimum degradation of Signal to Noise Ratio (SNR) at the output of the LO generator system.