Time-stamping-based synchronization of power electronics building block systems

Abstract

Integrated design has become a very attractive choice for modern power electronic systems. One way to introduce modularity to integrated designs is to utilize intelligent power electronics building blocks as a base for power electronics systems. The main reason for moving toward a building-blockbased design is that the traditional centralized control structure does not provide much flexibility and reusability. A buildingblock-based design needs a distributed control scheme that sets new challenges to system design. Distributed control of building blocks requires a deterministic, real-time communication scheme and accurate synchronization. The synchronization becomes an issue especially with ring-based control topologies. In this paper, a flexible time-stamping-based synchronization scheme for a cascaded ring communication topology is proposed. Further, a communication scheme suitable for building-block-based designs is presented. The achieved synchronization accuracy is analyzed in relation to a parallel connection of power semiconductors.

A converter control field bus protocol for power electronic systems with a synchronization accuracy of ±5ns

“…It is not possible to compensate this time, thus the synchronisation signal for the different modules have to be related to the last slave and all other modules have to delay their synchronisation signal. In [13] a basic idea is introduced to delay this synchronisation signal for a ring topology.…”