Timed automaton models for simple programmable logic controllers

Mader, Angelika; Wupper, H

doi:10.1109/emrts.1999.777456

Cited by 52 publications

(40 citation statements)

References 20 publications

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“…Similarly, Mokadem et al (2010) presents a case study where a global model for a timed multitask PLC program is created for verification purposes. This approach is similar to the one proposed by Mader and Wupper (1999) but verification is performed with UPPAAL using clocks and therefore with monotonic time representation. In Wang et al (2013), several aspects of PLC control systems including timers are modelled, using the component-based BIP framework.…”

Section: Related Workmentioning

confidence: 99%

“…Indeed, Mader and Wupper (1999) or Perin and Faure (2013) proposes an approach for modelling PLC timers using timed automaton models, but does not present verification results. As time is considered as a linear and monotonic function, the generated models would have a huge state space, making verification impossible if this approach would be applied to large systems, as the systems developed at CERN.…”

Section: Related Workmentioning

confidence: 99%

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Modelling and Formal Verification of Timing Aspects in Large PLC Programs

Adiego

Darvas

Viñuela

et al. 2014

IFAC Proceedings Volumes

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One of the main obstacle that prevents model checking from being widely used in industrial control systems is the complexity of building formal models out of PLC programs, especially when timing aspects need to be integrated. This paper brings an answer to this obstacle by proposing a methodology to model and verify timing aspects of PLC programs. Two approaches are proposed to allow the users to balance the trade-off between the complexity of the model, i.e. its number of states, and the set of specifications possible to be verified. A tool supporting the methodology which allows to produce models for different model checkers directly from PLC programs has been developed. Verification of timing aspects for real-life PLC programs are presented in this paper using NuSMV.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Modelling and Formal Verification of Timing Aspects in Large PLC Programs

Adiego

Darvas

Viñuela

et al. 2014

IFAC Proceedings Volumes

View full text Add to dashboard Cite

show abstract

“…The controller must also be modeled in this formalism, e.g. from a controller model in a standardized language, as presented in Mader and Wupper [1999], or from generic control blocks, as explained in Vyatkin and Hanisch [2000]. Whatever the solution selected to build the controller model, communication mode between timed automata is to be defined.…”

Section: Communications Between Modelsmentioning

confidence: 99%

Building Meaningful Timed Plant Models for Verification Purposes

Perin¹

2009

13th IFAC Symposium on Information Control Problems in Manufacturing

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Abstract:This paper presents a method to build a formal model of a plant, in the form of a network of timed automata, to be used for model-based verification of controllers. To ensure re-usability, this model is built by instantiation of generic components models. When the instantiated components models are assembled, spurious evolutions leading to states which do not represent the real behavior of the plant, can occur, owing to the rich semantics of the modeling formalism. Then a modeling strategy is proposed in order to discard these evolutions so as to reduce the state space of the plant model to the only meaningful states. The method is exemplified and discussed on a small case study.

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“…However, to be able to deal with timed specifications, formal models of timers are to be introduced, as proposed in [12] and [18]. Figure 6 shows the formal model of the timer launched by the activation of step 40 of the Grafcet of figure 5.…”

Section: Controller Modelmentioning

confidence: 99%

Coupling timed plant and controller models with urgent transitions without introducing deadlocks

Perin

Faure

2012

Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies &Amp; Factory Automation (ETFA 2012)

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This paper focuses on timed models which represent closed-loop systems composed of a plant and a logic controller. Both the plant and controller models are described in a formalism where urgent transitions are possible, to avoid non-realistic evolutions, and without deadlock when they are separated.It is first shown that deadlocks may occur in the plant model as soon as both models are coupled. To solve this issue, shared variables which model the changes of the inputs of the controller are defined and introduced in some actions of the plant model as well as in some guards of the controller model; the aim of these variables is to authorize evolutions of the controller only when at least one input has changed. This solution removes the previously pinpointed deadlocks and guarantees the reactivity of the controller.

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Timed automaton models for simple programmable logic controllers

Cited by 52 publications

References 20 publications

Modelling and Formal Verification of Timing Aspects in Large PLC Programs

Modelling and Formal Verification of Timing Aspects in Large PLC Programs

Building Meaningful Timed Plant Models for Verification Purposes

Coupling timed plant and controller models with urgent transitions without introducing deadlocks

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