Timing-Critical Path Analysis in Circuit Designs Considering Aging with Signal Probability

Tsai, Jiun-Cheng; Liang, Aaron C.-W.; Wen, Charles H.-P.

doi:10.1109/itcasia55616.2022.00017

Cited by 2 publications

(1 citation statement)

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“…Another common way to predict circuit life degradation is to predict circuit timing degradation based on machine learning algorithms. In [14], a framework based on functional timing analysis is developed and a timing CP analysis is proposed considering circuit function and signal probability. Machine learning algorithms were used to build a prediction model, taking aging time and signal probability as input to predict the delay of a cell, and then combining the functional time analysis and cell delay prediction model to estimate the actual delay of the circuit.…”

Section: Related Workmentioning

confidence: 99%

An aging simulation method based on the change of input vector inside the critical path

Sang,

Yang,

Wang

et al. 2024

J. Phys.: Conf. Ser.

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With the large-scale expansion and process shrinking of modern integrated circuits, aging has become one of the main factors threatening circuit reliability. To evaluate the impact of aging on circuit life, it is important to investigate aging simulation methods. Aiming at the problem of slow speed and insufficient accuracy of large-scale digital circuit aging simulation methods, a circuit aging simulation method based on the change of input vector inside the critical path (CICP) is proposed in this paper. First, the critical path (CP) with the tightest timing is extracted by static timing analysis (STA), and SPICE simulation is carried out to accurately predict the aging of the CP of the circuit. Second, the aging simulation is carried out considering the change of the internal input vector of the CP. The simulation results show that after changing the internal input signal, the aging path delay increases up to 3.5%.

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Section: Related Workmentioning

confidence: 99%