Top Electrode Engineering for Freedom in Design and Implementation of Ferroelectric Tunnel Junctions Based on Hf_1–xZr_xO₂

Abstract

Ferroelectric tunnel junctions (FTJs) based on ultrathin HfO 2 have great potential as a fast and energy-efficient memory technology compatible with complementary metal oxide semiconductors. FTJs consist of a ferroelectric film sandwiched between two distinct electrodes, the properties of which are intricately linked to the electrical properties of the FTJs. Here we utilize a W crystallization electrode (CE) to achieve a high and reproducible remanent polarization, combined with a metal replacement process in which the W is carefully removed and replaced by another top electrode (TE). In this way we separate the ferroelectric film properties from the device design and can thereby evaluate the effect of the TE work function (WF) and conduction band electron density (n e ) on the tunneling electroresistance (TER) and device reliability. We compare FTJs designed with a TiN bottom electrode and W, Cr, or Ni TE and find that the use of high electron density metals such as Ni or Cr as TE allows for an improved TER, albeit at the cost of reliability due to a large built-in electric field. To bypass this effect, a bilayer Cr/Ni TE is implemented, which allows for a high TER and minimal built-in field, leading to excellent retention and endurance beyond 10 8 cycles. The results presented here thus highlight a process flow for reliable design and implementation of FTJs.

Improved Endurance of Ferroelectric HfxZr1–xO2 Integrated on InAs Using Millisecond Annealing

“…The simulated peak surface temperatures of 550-710 °C are in the upper range and above the usually reported crystallization temperature of 400-600 °C required to form the ferroelectric orthorhombic phase in HZO. [2,11,[27][28][29] Thus, utilizing pulse energies in the range of 20-30 J cm -2 should yield a sufficiently high peak temperature to achieve ferroelectric properties in the HZO.…”

“…The discovery of ferroelectricity in doped HfO 2 has stimulated renewed interest in ferroelectrics for electronic devices [ 1 ] , based on the superior compatibility of HfO 2 with the Si complementary metal‐oxide‐semiconductor (CMOS) process in comparison to traditional perovskite‐based ferroelectrics. Specifically, ferroelectric tunnel junctions (FTJs) and ferroelectric field effect transistors (FeFETs) are excellent contenders to replace conventional memory technologies for storage and neuromorphic accelerators, [ 2,3 ] by providing ultra‐fast switching speeds, inherent non‐volatility, extremely low write energy, and low overall conductance. [ 4 ] The integration of ferroelectric materials onto III–V semiconductors is a key enabler for both high‐speed electronics and optoelectronics, as III–V materials provide both high electron mobility and a wide range of direct band gaps, [ 5,6 ] while Hf x Zr 1‐x O 2 (HZO) could provide new possibilities in terms of reconfigurable electronics [ 7 ] and in‐sensor computing.…”

Ferroelectric Tunnel Junction Memristors for In‐Memory Computing Accelerators

“…To separate material and device design, we employ an electrode replacement process, as previously reported in ref. [22]. A 50 nm W crystallization electrode (CE) was deposited using DC magnetron sputtering at 100 W to induce tensile strain in the Hf x Zr 1− x O 2 promoting the formation of the ferroelectric phase.…”

Advantages of binary stochastic synapses for hardware spiking neural networks with realistic memristors

“…The finite cycling endurance of memristive devices is an important limiting factor for practical implementation of memristive synapses in real-world neuromorphic systems [3]. Despite the fact that RRAM and phase change memory as well as ferroelectric RAM have demonstrated endurance past 10 9 state switching cycles [6] most report endurance values in the range of 10 5 -10 8 cycles [27,28]. These values are usually presented for full range switching between the two extreme resistive states, while one might expect gradual weight updates such as during analog deterministic learning in a SNN to be more beneficial for the lifetime of the device.…”