Top gated graphene transistors with different gate insulators

Pezoldt, Jörg; Hummel, Christian; Hanisch, Antonia; Hotovy, I.; Kadlečíková, Magdaléna; Schwierz, Frank

doi:10.1002/pssc.200982440

Cited by 13 publications

(9 citation statements)

References 22 publications

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“…Indeed, device engineers soon started research on exploiting graphene for electronic devices, most notably FETs (field‐effect transistor) with large‐area graphene channels. The first graphene MOSFET (metal‐oxide‐semiconductor FET) has been demonstrated in 2007 and many groups started investigating graphene transistors, see, e.g . and the surveys of graphene transistors provided in Refs.…”

Section: Introductionmentioning

confidence: 99%

Graphene Nanoribbons for Electronic Devices

et al. 2017

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Graphene nanoribbons show unique properties and have attracted a lot of attention in the recent past. Intensive theoretical and experimental studies on such nanostructures at both the fundamental and application-oriented levels have been performed. The present paper discusses the suitability of graphene nanoribbons devices for nanoelectronics and focuses on three specific device types -graphene nanoribbon MOSFETs, side-gate transistors, and three terminal junctions. It is shown that, on the one hand, experimental devices of each type of the three nanoribbon-based structures have been reported, that promising performance of these devices has been demonstrated and/or predicted, and that in part they possess functionalities not attainable with conventional semiconductor devices. On the other hand, it is emphasized that -in spite of the remarkable progress achieved during the past 10 yearsgraphene nanoribbon devices still face a lot of problems and that their prospects for future applications remain unclear.

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Section: Introductionmentioning

confidence: 99%

Graphene Nanoribbons for Electronic Devices

et al. 2017

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“…This has been explained as consequence of greater screening of the charged impurities by the metal gate [17]. In every instance that we know of [16,[18][19][20][21], the deposition of an oxide layer on high-mobility, non-epitaxial SLG has lead to a mobility decrease, probably as a result of more CI and defect scattering. Thus, it is surprising to observe a several-fold improvement for SLM.…”

Section: Introductionmentioning

confidence: 99%

Mobility enhancement and temperature dependence in top-gated single-layer MoS2

2013

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The deposition of a high-κ oxide overlayer is known to significantly enhance the room-temperature electron mobility in single-layer MoS2 (SLM) but not in single-layer graphene (SLG). We give a quantitative account of how this mobility enhancement is due to the non-degeneracy of the twodimensional electron gas system in SLM at accessible temperatures. Using our charged impurity scattering model [Ong and Fischetti, Phys. Rev. B 86, 121409 (2012)] and temperature-dependent polarizability, we calculate the charged impurity-limited mobility (µimp) in SLM with and without a high-κ (HfO2) top gate oxide at different electron densities and temperatures. We find that the mobility enhancement is larger at low electron densities and high temperatures because of finite-temperature screening, thus explaining the enhancement of the mobility observed at room temperature. µimp is shown to decrease significantly with increasing temperature, suggesting that the strong temperature dependence of measured mobilities should not be interpreted as being solely due to inelastic scattering with phonons. We also reproduce the recently seen experimental trend in which the temperature scaling exponent (γ) of µimp ∝ T −γ is smaller in top-gated SLM than in bare SLM. Finally, we show that a ∼ 37 percent mobility enhancement can be achieved by reducing the HfO2 thickness from 20 to 2 nm.

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“…However, in most graphene-based heterostructures, SLG must be physically supported by an insulating dielectric substrate such as SiO 2 , and the carrier mobility in such structures is about one order of magnitude lower [1] as a result of scattering with impurities, defects, and surface roughness. This reduction in carrier mobility can be further exacerbated when a top gate, consisting of a layer of high-κ dielectric material such as HfO 2 or Al 2 O 3 overlayed with metal, is deposited on SLG [2][3][4].…”

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Charged impurity scattering in top-gated graphene nanostructures

Ong

Fischetti

2012

Phys. Rev. B

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We study charged impurity scattering and static screening in a top-gated substrate-supported graphene nanostructure. Our model describes how boundary conditions can be incorporated into scattering, sheds light on the dielectric response of these nanostructures, provides insights into the effect of the top gate on impurity scattering, and predicts that the carrier mobility in such graphene heterostructures decreases with increasing top dielectric thickness and higher carrier density. An increase of up to almost 60 percent in carrier mobility in ultrathin top-gated graphene is predicted.

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Top gated graphene transistors with different gate insulators

Cited by 13 publications

References 22 publications

Graphene Nanoribbons for Electronic Devices

Graphene Nanoribbons for Electronic Devices

Mobility enhancement and temperature dependence in top-gated single-layer MoS2

Charged impurity scattering in top-gated graphene nanostructures

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