Tornado: Automatic Generation of Probing-Secure Masked Bitsliced Implementations

Abstract

Cryptographic implementations deployed in real world devices often aim at (provable) security against the powerful class of side-channel attacks while keeping reasonable performances. Last year at Asiacrypt, a new formal verification tool named tightPROVE was put forward to exactly determine whether a masked implementation is secure in the well-deployed probing security model for any given security order t. Also recently, a compiler named Usuba was proposed to automatically generate bitsliced implementations of cryptographic primitives. This paper goes one step further in the security and performances achievements with a new automatic tool named Tornado. In a nutshell, from the high-level description of a cryptographic primitive, Tornado produces a functionally equivalent bitsliced masked implementation at any desired order proven secure in the probing model, but additionally in the so-called register probing model which much better fits the reality of software implementations. This framework is obtained by the integration of Usuba with tightPROVE + , which extends tightPROVE with the ability to verify the security of implementations in the register probing model and to fix them with inserting refresh gadgets at carefully chosen locations accordingly. We demonstrate Tornado on the lightweight cryptographic primitives selected to the second round of the NIST competition and which somehow claimed to be masking friendly. It advantageously displays performances of the resulting masked implementations for several masking orders and proves their security in the register probing model.

Random Probing Security: Verification, Composition, Expansion and New Constructions

“…when J is a given set with |J| t 2 and W is the output of LeakingWires(G, p) satisfies (10), which concludes the proof.…”

“…Namely, verification tools are now able to produce a security proof or identify potential attacks from the description of a masked implementation at up to some masking orders (i.e., < 5) [4,14,11]. In the same vein, compilers have been built to automatically generate masked implementations at any order given the high level description of a primitive [5,11,10]. Nevertheless, no equivalent framework has yet been proposed to verify the security of implementations in the random probing model.…”

Hardware Private Circuits: From Trivial Composition to Full Verification

“…The fullVerif tool we propose is the first one that can verify the composability of concrete hardware implementations including glitches. The most similar tool is Tornado [31], which works for software implementations on micro-controllers. Some other works are less directly comparable, either because they span multiple table cells or because they aim at different goals.…”

Ascon v1.2: Lightweight Authenticated Encryption and Hashing

“…Next, we give a list of papers that either evaluate the side-channel and fault resistance of Ascon or elaborate protection mechanisms against side-channel and fault attacks [4,7,12,[28][29][30]50,51,55,60,68,[77][78][79]83].…”