2006
DOI: 10.1109/tns.2006.871802
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Total ionizing dose effects on the noise performances of a 0.13 /spl mu/m CMOS technology

Abstract: This paper presents a study of the ionizing radiation tolerance of 0.13 m CMOS transistors, in view of the application to the design of rad-hard analog integrated circuits. Static, signal and noise parameters of the devices were monitored before and after irradiation with 60 Co -rays at a 10 Mrad total ionizing dose. The effects on key parameters such as threshold voltage shift and 1 noise are studied and compared with the behavior under irradiation of devices in previous CMOS generations.

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Cited by 43 publications
(26 citation statements)
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“…The gate material is poly-crystalline Si. The devices tested are n-well FOXFETs with a width of 200 m and length of 1.48 m or 0.92 m. Because the channel is formed at the bottom of the STI, these structures enable us to focus exclusively on the defects in the isolation oxide [17]- [19].…”
Section: Methodsmentioning
confidence: 99%
“…The gate material is poly-crystalline Si. The devices tested are n-well FOXFETs with a width of 200 m and length of 1.48 m or 0.92 m. Because the channel is formed at the bottom of the STI, these structures enable us to focus exclusively on the defects in the isolation oxide [17]- [19].…”
Section: Methodsmentioning
confidence: 99%
“…Among them, single NMOS transistors with different gate widths ( , 600, 20, 10, 0.18 ) and lengths ( , 0.35, 10 ), and different kinds of pn junction diodes, including diodes with a deep N-well, double junction structure, as in the DNW-MAPS sensor. In the irradiation tests described in this paper, the DUTs were exposed to -rays from a source featuring a dose rate of 12 . The final integrated dose, 1100…”
Section: Duts and Test Proceduresmentioning
confidence: 99%
“…It can be easily shown that (4) Therefore, a decrease in may result in an increase of the output conductance of and, in turn, in a decrease of . Although deep submicron CMOS technologies are widely known to feature a high degree of radiation tolerance [12], narrow channel devices belonging to the same CMOS generation as the technology used for the DNW-MAPS discussed here were found to undergo the so called RINC (radiation-induced narrow channel) effect, originating from charge trapping in the shallow trench isolation oxides and proven to affect both N and P-channel devices [13]. A very similar behavior was actually found in irradiated devices from the same 130 nm process as the DNW-MAPS.…”
Section: A Charge Sensitivitymentioning
confidence: 99%
“…Although deep submicron CMOS technologies are widely known to feature a high degree of radiation tolerance [12], narrow channel devices (W<1 µm) belonging to the same CMOS generation as the technology used for the DNW-MAPS discussed here were found to undergo the so called RINC (radiation-induced narrow channel) effect, originating from charge trapping in the shallow trench isolation oxides and proven to affect both N and P-channel devices [13]. A very similar behavior was actually found in irradiated devices from the same 130 nm process as the DNW-MAPS.…”
Section: A Charge Sensitivitymentioning
confidence: 99%