Toward monolithic growth integration of nanowire electronics in 3D architecture: a review

Liang, Lei; Hu, Ruijin; Yu, Linwei

doi:10.1007/s11432-023-3774-y

Cited by 9 publications

(1 citation statement)

References 151 publications

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“…Low-dimensional nanostructures and materials, including 0D QDs, 1D CNTs, 2D graphene, 2D MoS 2 , and 3D perovskites, have been widely developed as functional semiconducting, conductive, or substrate materials in the emerging applications of flexible and stretchable electronics. The bottom–up technique allows for the production of multiple high-quality low-dimensional nanostructures using high-yield and diverse low-temperature processes (such as catalytic growth of ultrathin SiNWs for semiconducting 1D channels in FETs 281 ). This technique can be useful for constructing advanced sensors, memories, and FET logic circuits.…”

Section: Discussionmentioning

confidence: 99%

Low-dimensional nanostructures for monolithic 3D-integrated flexible and stretchable electronics

Hua,

Shen

2024

Chem. Soc. Rev.

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Section: Discussionmentioning

confidence: 99%

Low-dimensional nanostructures for monolithic 3D-integrated flexible and stretchable electronics

Hua,

Shen

2024

Chem. Soc. Rev.

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Performance Enhancement of Carbon Nanotube Network Transistors via SbI₃ Inner‐Doping in Selected Regions

Guo,

Wang,

Zhao

et al. 2024

Advanced Materials

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Semiconducting single‐wall carbon nanotubes (s‐SWCNTs) represent one of the most promising materials for surpassing Moore's Law and developing the next generation of electronic devices. Despite numerous developed approaches, reducing the contact resistance of s‐SWCNTs networks remains a significant challenge in achieving further enhancements in electronic performance. In this study, antimony triiodide (SbI3) is efficiently encapsulated within high‐purity s‐SWCNTs films at low temperatures, forming 1D SbI3@s‐SWCNTs vdW heterostructures. The semiconductor–metal transition of individual SbI3@s‐SWCNTs is characterized via sensitive dielectric force microscopy, with the results confirmed through electrical device tests. The electrical behavior transition is attributed to an interlayer charge transfer, as demonstrated by Kelvin probe force microscopy. Moreover, the electrical performance of s‐SWCNTs thin‐film transistors improves significantly with SbI3@s‐SWCNTs networks as contact electrodes. This process reduces the contact resistance between the s‐SWCNTs channel and the electrodes, enhancing electrical performance. Specifically, the contact resistance decreases to one‐third of the original, the carrier mobility increases by ≈10 times, the on‐off ratio exceeds 106, and the subthreshold swing reduces significantly to ≈65 mV dec−1. These results demonstrate the effectiveness of inner‐doping‐induced metallization of s‐SWCNTs in the contact region, essential for advancing carbon nanotube electronic devices and circuits.

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Low-temperature atomic-level trimming on Ge interfused surface for gate-all-around Si nanosheets transistors

Sang,

Jiang,

Wei

et al. 2024

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Toward monolithic growth integration of nanowire electronics in 3D architecture: a review

Cited by 9 publications

References 151 publications

Low-dimensional nanostructures for monolithic 3D-integrated flexible and stretchable electronics

Low-dimensional nanostructures for monolithic 3D-integrated flexible and stretchable electronics

Performance Enhancement of Carbon Nanotube Network Transistors via SbI₃ Inner‐Doping in Selected Regions

Low-temperature atomic-level trimming on Ge interfused surface for gate-all-around Si nanosheets transistors

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Toward monolithic growth integration of nanowire electronics in 3D architecture: a review

Cited by 9 publications

References 151 publications

Low-dimensional nanostructures for monolithic 3D-integrated flexible and stretchable electronics

Low-dimensional nanostructures for monolithic 3D-integrated flexible and stretchable electronics

Performance Enhancement of Carbon Nanotube Network Transistors via SbI3 Inner‐Doping in Selected Regions

Low-temperature atomic-level trimming on Ge interfused surface for gate-all-around Si nanosheets transistors

Contact Info

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Performance Enhancement of Carbon Nanotube Network Transistors via SbI₃ Inner‐Doping in Selected Regions