Toward Realization of Scalable Packaging and Wiring for Large-Scale Superconducting Quantum Computers

Tamate, Shuhei; Tabuchi, Yoshihiko; Nakamura, Y.

doi:10.1587/transele.2021sep0007

Cited by 11 publications

(4 citation statements)

References 47 publications

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“…We believe that the experimental demonstration for a small number of qubits can be readily done since the proposed device geometry is similar to the devices with which trapping a single electron on helium was achieved [9,18,20,56] and we can make use of the well-established fabrication technique of a nanoscale ferromagnet for semiconductor quantum dots [35,42,57]. Together with the feasibility of employing the three-dimensional wiring techniques under development [26,58,59], this architecture makes electrons on helium a strong candidate to realize a fault-tolerant quantum computer.…”

Section: Summary and Discussionmentioning

confidence: 98%

Blueprint for quantum computing using electrons on helium

Kawakami,

Chen,

Benito

et al. 2023

Phys. Rev. Applied

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We present a blueprint for building a fault-tolerant quantum computer using the spin states of electrons on the surface of liquid helium. We propose to use ferromagnetic micropillars to trap single electrons on top of them and to generate a local magnetic field gradient. Introducing a local magnetic field gradient hybridizes charge and spin degrees of freedom, which allows us to benefit from both the long coherence time of the spin state and the long-range Coulomb interaction that affects the charge state. We present concrete schemes to realize single-and two-qubit gates and quantum nondemolition readout. In our framework, the hybridization of charge and spin degrees of freedom is large enough to perform fast qubit gates and small enough not to degrade the coherence time of the spin state significantly, which leads to the realization of high-fidelity qubit gates.

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Section: Summary and Discussionmentioning

confidence: 98%

Blueprint for quantum computing using electrons on helium

Kawakami,

Chen,

Benito

et al. 2023

Phys. Rev. Applied

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“…For a qubit processor made of N elementary building blocks, the size of the Hilbert space is 2 N . Current research focuses on scaling up the number of qubits N, but this approach faces challenges such as wiring [2], expensive control electronics [3], and frequency crowding [4,5]. A complementary strategy is to increase the size of each building block by replacing the qubit with a qudit (d-level system), which yields a Hilbert space of size d N .…”

Section: Introductionmentioning

confidence: 99%

Emulating two qubits with a four-level transmon qudit for variational quantum algorithms

Cao,

Bakr,

Campanaro

et al. 2024

Quantum Sci. Technol.

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Using quantum systems with more than two levels, or qudits, can scale the computational space of quantum processors more eﬃciently than using qubits, which may oﬀer an easier physical implementation for larger Hilbert spaces. However, individual qudits may exhibit larger noise, and algorithms designed for qubits require to be recompiled to qudit algorithms for execution. In this work, we implemented a two-qubit emulator using a 4-level superconducting transmon qudit for variational quantum algorithm applications and analyzed its noise model. The major source of error for the variational algorithm was readout misclassiﬁcation error and amplitude damping. To improve the accuracy of the results, we applied error-mitigation techniques to reduce the eﬀects of the misclassiﬁcation and qudit decay event. The ﬁnal predicted energy value is within the range of chemical accuracy. Our work demonstrates that transmon qudits are a practical alternative to qubits for variational algorithms.

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“…In ion trap-based quantum computers, the electrical, magnetic, thermal, and thermo-mechanical performance of the heterogeneously integrated package at cryogenic temperatures is crucial for the number of usable qubits per integrated area and thus ultimately determines the achievable computing power [4,[8][9][10][11][12][13]. Qubit chip integration using Flip-Chip bonding has been demonstrated to enable dense chip integration in 3D architecture [5,[14][15][16][17][18][19]. Wherein, traditional materials like copper (Cu), which is a standard metallization layer, are not superconducting due to quasiparticle excitation from heat formation thus reducing qubit performance.…”

Section: Introductionmentioning

confidence: 99%

Investigation of Aluminum and Gold Flip-Chip Bonding for Quantum Device Integration

Cirulis,

Zschenderlein,

Braun

et al. 2024

IMAPSource Proceedings

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The majority of qubit chip integration is realized in a two-dimensional (2D) architecture. Whereas 3D architecture enables more advantages like efficient interconnect routing, allowing for more compact qubit coupling geometries, reducing form factor, and increased connectivity beyond nearest-neighbor interactions. Flipchip (FC) assembly has been demonstrated to enable 3D architecture connecting qubit chip, interposer, and readout in a sandwich-like structure. Moreover, 3D integration allows the fabrication of hosting chip circuitry without degrading the qubit performance [1–4]. Different material considerations have to be taken into account since qubit operational frequency is in the gigahertz range and operating temperature is in the mK range to avoid thermal excitation. Materials that possess superconducting characteristics like Indium (In), Titanium Nitride (TiN), Tantalum Nitride (TaN), and Niobium (Nb) have been discussed as potential interconnect between building blocks [3, 5]. The In bumping on Aluminum (Al) redistribution layers require under-bump metallization (UBM) layers thus introducing multiple fabrication steps before the bonding process. An alternative approach would be to use the existing Al surface to electrochemically grow Al bumps and bond the chip using thermosonic bonding (TSB) at below 150°C to form a homogeneous metal-metal interface [6, 7].

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Toward Realization of Scalable Packaging and Wiring for Large-Scale Superconducting Quantum Computers

Abstract: In this paper, we review the basic components of superconducting quantum computers. We mainly focus on the packaging and wiring technologies required to realize large-scalable superconducting quantum computers.

Cited by 11 publications

References 47 publications

Blueprint for quantum computing using electrons on helium

Blueprint for quantum computing using electrons on helium

Emulating two qubits with a four-level transmon qudit for variational quantum algorithms

Investigation of Aluminum and Gold Flip-Chip Bonding for Quantum Device Integration

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