Toward sub-micron oxide thin-film transistors for digital holography

Abstract

-High-performance 2-μm-channel oxide thin-film transistors (TFT) on glass substrate for a 7-μ m-pixel-pitch spatial light modulator panel for digital holography applications were fabricated using a two-step source/drain etching process. It showed a μ FE of 45.5 cm 2 /Vs, SS of 0.10 V/dec, and Von of near zero voltage. Furthermore, we succeeded in the demonstration of sub-micron TFTs, which is an indispensable route to next-generation spatial light modulation devices with near 1-μm pixel pitch. The issue of short-channel transistors for display applications is also introduced. Finally, the digital holographic demonstration results based on the fabricated backplane are presented.Keywords -sub-micron TFT, spatial light modulator on glass (SLMoG), stitch, mix and match, wet treatment, digital hologram.DOI # 10.1002/jsid.535 Objective and backgroundThe concept of holography was introduced by Dennis Gabor, a Hungarian engineer, during the work on electron microscopes in 1947. 1,2 He used a filtered mercury arc light source, while first holography application was realized after the invention of the laser in 1964. 3 The word "holography" means "whole recording." Holography literally realizes 3D images through the reconstruction of all data from a diffraction pattern on the basis of mathematical calculation and processing. For the public, the main concerns regarding holograms are the resolution and viewing angle of the holographic image. As a consequence of the remarkable development of the display industry over the decades, people are used to high-resolution display. They take the realization of high-resolution holography with natural images for granted. They also want to watch holographic images from various directions freely, as they watch television. For these reasons, when we make a holographic image, two main factors are important: viewing angle and resolution. The relationship between the viewing angle of a digital holographic panel, Ψ , wavelength of laser, λ, and pixel pitch of the panel, p, is given by the following equation.The analog hologram, which is a well-known type of hologram, has met the expectations. It adopts around 10-nm-sized grains (a very fine pixel pitch) on a plate; as a result, people can experience a very natural 3D image and very wide-viewing angle. However, the analog hologram has some constraints. First, the fabrication process for defining very fine pitch through a large area is very hard and expensive. Furthermore, an analog hologram can show only a static holographic image already defined during the fabrication process. For these reasons, industries are trying to realize digital holograms that generally have an active matrix for dynamic video applications. In comparison with the analog hologram, the digital hologram has a relatively large pixel pitch because both the switching transistor and the storage capacitor for dynamic operation should be included in a pixel.Recently, with a focus on achieving a wide viewing angle for the display, many industries have tried to shrink the p...

The new route for realization of 1‐μm‐pixel‐pitch high‐resolution displays

“…In contrast, oxide thin‐film transistors (TFTs) can guarantee the good immunity for short channel effects because there is no p‐n junction in the device structure and the channel material has a wide bandgap . To obtain a high‐PPI panel based on the oxide TFT system, the back‐channel‐etched (BCE) TFT has been widely adopted because of its small footprint, and we have reported display panels based on the SLM for digital holography experiencing a 10° viewing angle based on the 7‐μm‐pixel‐pitch and the 3‐μm‐pixel‐pitch backplanes with the BCE scheme . First, we fabricated the first SLM panel with a 20‐μm pixel pitch in 2014.…”

“…9,10 To obtain a high-PPI panel based on the oxide TFT system, the back-channel-etched (BCE) TFT has been widely adopted because of its small footprint, and we have reported display panels based on the SLM for digital holography experiencing a 10°viewing angle based on the 7-μm-pixel-pitch and the 3-μm-pixel-pitch backplanes with the BCE scheme. [11][12][13] First, we fabricated the first SLM panel with a 20-μm pixel pitch in 2014. The second SLM panel with a 7-μm pixel pitch was fabricated in 2016 via process improvements.…”

46‐2: Invited Paper: Ultimate Resolution Active Matrix Display with Oxide TFT Backplanes for Electronic Holographic Display

“…Therefore BCE structure is adapted for SLMoG panel. The basic structure and manufacturing processes were already reported [3]. It is generally known that the thickness of gate dielectric layer should be reduced as scaling down the channel length to balance the effects of gate field and drain field on channel region.…”

Systematic Investigation of Subtractive Contact Patterning for High-Resolution Organic Electronic Devices

“…10 In particular, for virtual reality/ augmented reality displays, high-resolution patterns (several micrometers) are required for OLEDs. 11,12 For patterning of OLEDs, a fine metal mask (FMM) is primarily used, but FMM suffers from the difficulty of creating high-resolution patterns of several micrometers because of the sagging phenomenon of shadow masks, which results in shadowed areas among the pixels. Furthermore, various patterning methods such as orthogonal lithography, 13,14 sacrificial layer-assisted lift-off patterning, 15,16 and continuous microcontact printing 17 have been proposed.…”