Towards cognitive reconfigurable hardware: Self-aware learning in RTR fault-tolerant SoCs

Navas, Byron; Sander, Ingo; Öberg, Johnny

doi:10.1109/recosoc.2015.7238103

Cited by 3 publications

(1 citation statement)

References 22 publications

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“…Even being well aware of this limitation, the study and distillation of principles found in biological systems that have been developed through evolution remains a challenge of the utmost importance for scientists. Hence, in spite of the unavoidable inconvenience that nature cannot be fully copied, the vast majority of bio-inspired models and electronic systems are built with the main purpose of better understanding, mimicking, or getting some inspiration from biological systems [2][3][4].…”

Section: Introductionmentioning

confidence: 99%

Three-dimensional artificial organism model developed upon a two-layer coarse-fine-grid network approach

Szász

2017

IRASE

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In an attempt to devise a model which more closely imitates cellular biology a three-dimensional (3D) artifi cial organism model developed upon a two-layer coarse-fi ne-grid network model is proposed in this paper. The strength of this original approach is that it endeavors to capture the complexity of both the cellular networks as well as that of the biological cell itself, by implementing the internal biological phenomena of an organism into a 3D two different network topology hardware layer. In essence, this model not only keeps the full advantages of previously created 2D models that enable the implementation of similar self-replicating or selfrepairing abilities akin to those expressed by its cellular equivalents in nature, but there the inherent need of artifi cial cell structures to fulfi ll the entire role of a biological cell in the network is also expressed. Computer-aided simulation results prove that this kind of 3D coarse-fi ne-grid approach is well feasible physically therefore the model has been implemented into a computing platform made of custom reconfi gurable Field Programmable Gate Array (FPGA) processors.

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Section: Introductionmentioning

confidence: 99%

Three-dimensional artificial organism model developed upon a two-layer coarse-fine-grid network approach

Szász

2017

IRASE

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SSS

Liu

et al. 2019

J. Emerg. Technol. Comput. Syst.

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Network-on-Chip (NoC) has become the de facto communication standard for multi-core or many-core System-on-Chip (SoC) due to its scalability and flexibility. However, an important factor in NoC design is temperature, which affects the overall performance of SoC—decreasing circuit frequency, increasing energy consumption, and even shortening chip lifetime. In this article, we propose SSS, a self-aware SoC using a static-dynamic hybrid method that combines dynamic mapping and static mapping to reduce the hotspot temperature for NoC-based SoCs. First, we propose monitoring and thermal modeling for self-state sensoring. Then, in static mapping stage, we calculate the optimal mapping solutions under different temperature modes using the discrete firefly algorithm to help self-decision making. Finally, in dynamic mapping stage, we achieve dynamic mapping through configuring NoC and SoC sentient units for self-optimizing. Experimental results show that SSS has substantially reduced the peak temperature by up to 37.52%. The FPGA prototype proves the effectiveness and smartness of SSS in reducing hotspot temperature.

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A Survey of MPSoC Management toward Self-Awareness

Gonzalez-Martinez,

Sandoval-Arechiga,

Solis-Sanchez

et al. 2024

Micromachines

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Managing Multi-Processor Systems-on-Chip (MPSoCs) is becoming increasingly complex as demands for advanced capabilities rise. This complexity is due to the involvement of more processing elements and resources, leading to a higher degree of heterogeneity throughout the system. Over time, management schemes have evolved from simple to autonomous systems with continuous control and monitoring of various parameters such as power distribution, thermal events, fault tolerance, and system security. Autonomous management integrates self-awareness into the system, making it aware of its environment, behavior, and objectives. Self-Aware Cyber-Physical Systems-on-Chip (SA-CPSoCs) have emerged as a concept to achieve highly autonomous management. Communication infrastructure is also vital to SoCs, and Software-Defined Networks-on-Chip (SDNoCs) can serve as a base structure for self-aware systems-on-chip. This paper presents a survey of the evolution of MPSoC management over the last two decades, categorizing research works according to their objectives and improvements. It also discusses the characteristics and properties of SA-CPSoCs and explains why SDNoCs are crucial for these systems.

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Towards cognitive reconfigurable hardware: Self-aware learning in RTR fault-tolerant SoCs

Cited by 3 publications

References 22 publications

Three-dimensional artificial organism model developed upon a two-layer coarse-fine-grid network approach

Three-dimensional artificial organism model developed upon a two-layer coarse-fine-grid network approach

SSS

A Survey of MPSoC Management toward Self-Awareness

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