Towards Efficient Superconducting Quantum Processor Architecture Design

Li, Gushu; Ding, Yufei; Xie, Yuan

doi:10.1145/3373376.3378500

Cited by 49 publications

(28 citation statements)

References 44 publications

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“…Therefore, DSE methodologies will allow to perform a cross-layer codesign of the full-stack quantum system which is crucial in the NISQ era due to the relatively low number of qubits and the impact of noise on computation. Note that along the same lines, researchers recently started evaluating different quantum processor architecture designs based on an application-driven approach for different quantum technologies such as superconducting qubits [4] and trapped ions [20].…”

Section: Discussion On the Extension Of The Dse Methodologymentioning

confidence: 99%

On Structured Design Space Exploration for Mapping of Quantum Algorithms

Bandic

Zarein

Alarcón

et al. 2020

2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)

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Quantum algorithms can be expressed as quantum circuits when the circuit model of computation is adopted. Such a circuit description is usually hardware-agnostic, that is, it does not consider the limitations that the quantum hardware might have. In order to make quantum algorithms executable on quantum devices they need to comply to their constraints, which mainly affect the parallelism of quantum operations and the possible interactions between the qubits. The process of adapting a quantum circuit to meet the quantum chip restrictions is known as mapping. The resulting circuit usually has a higher number of gates and depth, decreasing the algorithm's reliability. Different mapping solutions have been already proposed. Most of them are meant for a specific quantum processor and differ in methodology, approach and features. In addition, they are usually only compared in terms of added gates, circuit depth and compilation time. No thorough comparative analysis of the different mapping solutions performance and features has been performed so far.In this paper, we propose to apply structured design space exploration (DSE) methodologies to the mapping procedures. This will allow not only to have a more in depth and structured analysis of their performance but also to identify what features are key and worth to implement. By using DSE we will be able to: i) determine in what regimes some mapping solutions outperform others; ii) derive optimal mapping strategies for specific quantum algorithms and quantum processors; and iii) perform an scalability analysis. In addition, DSE techniques cannot only be applied to the mapping layer that is key for bridging quantum applications to quantum devices, but also to the full-stack quantum computing system allowing for its crosslayer co-design.

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Section: Discussion On the Extension Of The Dse Methodologymentioning

confidence: 99%

On Structured Design Space Exploration for Mapping of Quantum Algorithms

Bandic

Zarein

Alarcón

et al. 2020

2020 XXXV Conference on Design of Circuits and Integrated Systems (DCIS)

View full text Add to dashboard Cite

show abstract

“…The hardware-oriented crosstalk mitigation strategies have several physical constraints. For example, the tunable coupling [7] is only applicable for tunable coupling superconducting devices, whereas the frequency allocation [5] arXiv:2106.01671v1 [cs.AR] 3 Jun 2021 Fig. 2: Crosstalk injection of CSWAP circuit.…”

Section: B Crosstalk Mitigationmentioning

confidence: 99%

“…After assessing crosstalk, there are two types of methods to mitigating it. The first one is based on hardware strategies, such as tunable coupling [7], or frequency allocation [5]. From the software perspective, crosstalk has been mitigated by changing simultaneous CNOT operations with high crosstalk to execute separately while trading off the increase of the decoherence time as in [8].…”

Section: Introductionmentioning

confidence: 99%

Analyzing crosstalk error in the NISQ era

Niu

Todri‐Sanial

2021

2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

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Noisy Intermediate-Scale Quantum (NISQ) hardware has unavoidable noises, and crosstalk error is a significant error source. When multiple quantum operations are executed simultaneously, the quantum state can be corrupted due to the crosstalk between gates during simultaneous operations, decreasing the circuit fidelity. In this work, we first report on several protocols for characterizing crosstalk. Then, we discuss different crosstalk mitigation methods from the hardware and software perspectives. Finally, we perform crosstalk injection experiments on the IBM quantum device and demonstrate the fidelity improvement with the crosstalk mitigation method.

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“…The noise-free simulations are performed with Qiskit Aer statevector simulator and the noisy simulations are performed with Qiksit Aer qasm simulator (version 0.6.0). For the hardware yield rate, we adopt the yield simulation method and qubit frequency allocation algorithm in [56]. All experiments are performed on a MacBook Pro with 2.8 GHz Quad-Core Intel Core i7 CPU and 16GB 2133MHz LPDDR3 memory.…”

Section: A Experiments Setupmentioning

confidence: 99%

Software-Hardware Co-Optimization for Computational Chemistry on Superconducting Quantum Processors

Li¹,

Shi²,

Javadi-Abhari³

2021

Preprint

Self Cite

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Computational chemistry is the leading application to demonstrate the advantage of quantum computing in the near term. However, large-scale simulation of chemical systems on quantum computers is currently hindered due to a mismatch between the computational resource needs of the program and those available in today's technology. In this paper we argue that significant new optimizations can be discovered by codesigning the application, compiler, and hardware. We show that multiple optimization objectives can be coordinated through the key abstraction layer of Pauli strings, which are the basic building blocks of computational chemistry programs. In particular, we leverage Pauli strings to identify critical program components that can be used to compress program size with minimal loss of accuracy. We also leverage the structure of Pauli string simulation circuits to tailor a novel hardware architecture and compiler, leading to significant execution overhead reduction by up to 99%. While exploiting the high-level domain knowledge reveals significant optimization opportunities, our hardware/software framework is not tied to a particular program instance and can accommodate the full family of computational chemistry problems with such structure. We believe the co-design lessons of this study can be extended to other domains and hardware technologies to hasten the onset of quantum advantage.

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Towards Efficient Superconducting Quantum Processor Architecture Design

Cited by 49 publications

References 44 publications

On Structured Design Space Exploration for Mapping of Quantum Algorithms

On Structured Design Space Exploration for Mapping of Quantum Algorithms

Analyzing crosstalk error in the NISQ era

Software-Hardware Co-Optimization for Computational Chemistry on Superconducting Quantum Processors

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