Towards Power Centric Analog Design

Svensson, Christer

doi:10.1109/mcas.2015.2450671

Cited by 9 publications

(7 citation statements)

References 18 publications

(47 reference statements)

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“…To this end, we focus on a particular type of ADC -the pipeline ADC. This type of ADC is typically designed for intermediate bit resolutions, medium to high sampling rates f s and has power consumption that is comparatively superior to other types of ADCs when observed over a wide range of operating resolutions (very low to very high) [11], [12], [13].…”

Section: System Model and Sumrate Calculationmentioning

confidence: 99%

An energy efficiency perspective on massive MIMO quantization

Sarajlić

Liu

Edfors

2016

2016 50th Asilomar Conference on Signals, Systems and Computers

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Abstract-One of the basic aspects of Massive MIMO (MaMi) that is in the focus of current investigations is its potential of using low-cost and energy-efficient hardware. It is often claimed that MaMi will allow for using analog-to-digital converters (ADCs) with very low resolutions and that this will result in overall improvement of energy efficiency. In this contribution, we perform a parametric energy efficiency analysis of MaMi uplink for the entire base station receiver system with varying ADC resolutions. The analysis shows that, for a wide variety of system parameters, ADCs with intermediate bit resolutions (4 -10 bits) are optimal in energy efficiency sense, and that using very low bit resolutions results in degradation of energy efficiency.

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Section: System Model and Sumrate Calculationmentioning

confidence: 99%

An energy efficiency perspective on massive MIMO quantization

Sarajlić

Liu

Edfors

2016

2016 50th Asilomar Conference on Signals, Systems and Computers

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“…The importance of low supply voltage in a digital system for low power consumption pioneered in [95] and [96] is evident from (4.1) [97] which shows the dependence of power consumption on output node switching activity α in a single clock cycle in a digital circuit , clock frequency f c and square of supply voltage V dd…”

Section: Design Trade-offs In the Front End Amplifiers For Receivermentioning

confidence: 99%

“…Instead, the low power consumption of transistor in amplification mode depends upon the noise bandwidth B n , output load capacitance expressed in terms of minimum capacitance implementable in a given technology C min , the output voltage swing V F S and the voltage gain A v as given by (4.2) derived in [97]:…”

Section: Design Trade-offs In the Front End Amplifiers For Receivermentioning

confidence: 99%

Variation-Aware System Design Simulation Methodology for Capacitive BCC Transceivers

Kazim

2015

Linköping Studies in Science and Technology. Dissertations

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Capacitive body coupled communication (BCC), frequency range 500 kHz to 15 MHz 1 , is considered an emerging alternate short range wireless technology which can meet the stringent low power consumption (< 1 mW) 2 and low data rate (< 100 kbps) 3 requirements for the next generation of connected devices for applications like internet-of-things (IoT) and wireless sensor network (WSN). But a reliable solution for this mode of communication covering all possible body positions and maximum communication distances around the human body could not be presented so far, despite its inception around 20 years back in 1995. The uncertainties/errors associated with experimental measurement setup create ambiguity about the measured propagation loss or transmission errors. The reason is the usage of either earth grounded lab instruments or the direct coupling of earth ground with transmitter/receiver or the analog front end cut-off frequency limitations in a few MHz region or the balun to provide isolation or the measurements on simplified homogeneous biological phantoms. Another source of ambiguity in the experimental measurements is attributed to the natural variations in human tissue electrophysiological properties from person to person which are also affected by physical factors like age, gender, number of cells at different body locations and humidity. The analytical models presented in the literature are also oversimplified which do not predict the true propagation loss for capacitive BCC channel.An attempt is being made to understand and demonstrate, qualitatively and quantitatively, the physical phenomenon of signal transmission and propagation characteristics e.g., path loss in complex scenarios for capacitive BCC channel by both the experimental observations/measurements and simulation models in this PhD dissertation. An alternate system design simulation methodology has been proposed which estimates the realistic path loss even for longer communication distances > 50 cm for capacitive BCC channel. The proposed simulation methodology allows to vary human tissue dielectric/thickness properties and easily integrates with the circuit simulators as the output is in the form of S-parameters. The advantage is that the capacitive BCC channel characteristics e.g., signal attenuation as a function of different physical factors could be readily simulated at the circuit level to choose appropriate circuit topology and define suitable system specifications. This simulation methodology is based on full-wave electromagnetic analysis and 3D modeling of human body and environment using their conductivity, permittivity, and tangent loss profile to estimate the realistic propagation loss or path loss due to their combined interaction with the electrode coupler for capacitive BCC channel. This methodology estimates the complex path impedance from transmitter to receiver which is important to determine the matching requirements for maximum power transfer. The simulation methodology also contributes towards better understanding of...

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“…Comparing to limiter based demodulator, Ph-ADC based demodulator offers more flexibility as it can pair with zero-IF and low-IF receiver. Besides, Ph-ADC based demodulator can be implemented in a fully digital manner which is less sensitive to process voltage and temperature (PVT) variation compared to analog/mixed-signal circuitry [18].…”

Section: Introductionmentioning

confidence: 99%

A 88μWdigital phase-domain GFSK demodulator compatible with low-IF and zero-IF receiver with preamble detection for BLE

Ung¹,

Rahman²

2020

Turk J Elec Eng & Comp Sci

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Unlike conventional analog-to-digital converter (ADC), phase-domain ADC (Ph-ADC) is more power efficient for the implementation of fully digital Gaussian frequency shift keying (GFSK) demodulator in bluetooth low energy (BLE). Besides, Ph-ADC based demodulator is flexible to pair with low-IF and zero-IF receiver, opposed to limiter based demodulator that work with low-IF receiver only. Yet, currently reported Ph-ADC based demodulator lack of preamble detection for BLE which will be used as symbol clock synchronization. In this work, a Ph-ADC based demodulator is proposed with the feature of preamble detection on BLE's packet. The detected preamble is used for symbol clock recovery and compensation of carrier frequency offset in a BLE packet. Besides, the proposed demodulator is flexible to demodulate IF or baseband signal by simply configuring a parameter value. Using MATLAB, minimum signal-to-noise Ratio (SNR) needed to demodulate BLE packet is estimated using Monte Carlo simulation with 99 % confidence level. For hardware implementation, the proposed demodulator is implemented at RTL in Synopsys and its layout is generated using 0.18 µm CMOS technology. To understand the trade-off between power consumption, layout size and minimum SNR needed, the proposed Ph-ADC based demodulator is scaled to a different combination of 4-bit to 6-bit resolution and 2 MHz to 16 MHz sampling rate. Configuration with the best trade-off for the proposed Ph-ADC demodulator can achieve bit error rate (BER) of 0.1 % at SNR of 12.5 dB and able to tolerate carrier frequency offset of ± 200 kHz while using only half the power needed by state of the art limiter based demodulator.

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Towards Power Centric Analog Design

Cited by 9 publications

References 18 publications

An energy efficiency perspective on massive MIMO quantization

An energy efficiency perspective on massive MIMO quantization

Variation-Aware System Design Simulation Methodology for Capacitive BCC Transceivers

A 88μWdigital phase-domain GFSK demodulator compatible with low-IF and zero-IF receiver with preamble detection for BLE

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