Towards the High-Level Design of Optical Networks-on-Chip. Formalization of Opto-Electrical Interfaces

Biere, M.; Gheorghe, L.; Nicolescu, Gabriela; O’Connor, Ian; Wainer, Gabriel

doi:10.1109/icecs.2007.4511021

Cited by 2 publications

(1 citation statement)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…So far, the NI architecture has been overlooked in most evaluation frameworks or, in the best case, only considered in the early stage of design. Some pioneer works account for the NI in their network analysis for wavelength‐routed optical networks or space‐routed ONoCs . In every case, they suffer from one of the following weaknesses: First, they model NI components only at behavioural level , or they target only the more abstract level of formalization of interface specification ; second, they consider only the signal driving section of the NI, basically up to the (de)serializers.…”

Section: Related Workmentioning

confidence: 99%

Capturing the sensitivity of optical network quality metrics to its network interface parameters

Ortín-Obón

Ramini

Viñals

et al. 2014

Concurrency and Computation

View full text Add to dashboard Cite

Optical networks-on-chip (ONoCs) are gaining momentum as a way to improve energy consumption and bandwidth scalability in the next generation multi-core and many-core systems. Although many valuable research works have investigated their properties, the vast majority of them lacks an accurate exploration of the network interface architecture required to support optical communications on the silicon chip. The complexity of this architecture is especially critical for a specific kind of ONoCs: the wavelength-routed ones. These are capable of delivering contention-free all-to-all connectivity without the need for path reservation, unlike space-routed ONoCs. From a logical viewpoint, they can be considered as full non-blocking crossbars; thus, the control complexity is implemented at network interfaces. To our knowledge, this paper proposes the first complete network interface architecture for wavelength-routed optical NoCs, by coping with the intricacy of networking issues such as flow control, buffering strategy, deadlock avoidance, serialization, and above all, their codesign in a complete architecture. The evaluation methodology spans from area and energy analysis via actual synthesis runs in 40-nm technology to RTL-equivalent (register-transfer level) SystemC modelling of the network architecture, and aims at verifying whether the projected benefits of ONoCs versus their electrical counterparts are still preserved when the overhead of their network interface is considered in the analysis

show abstract

Section: Related Workmentioning

confidence: 99%