Trade-offs and progressive adoption of FPGA acceleration in network traffic monitoring

Abstract

Current hardware acceleration cores for network traffic processing are often well optimized for one particular task and therefore provide high level of hardware acceleration. But for many applications, such as network traffic monitoring and security, it is also necessary to achieve rapid development cycle to provide fast response to security threats. We propose and evaluate a new concept of hardware acceleration for flexible flow-based network traffic monitoring with support of application protocol analysis. The concept is called Software Defined Monitoring (SDM) and it relies on a configurable hardware accelerator implemented in FPGA, coupled with smart monitoring tasks running as software on general CPU. The monitoring tasks in the software control the level of detail and type of information retained during the hardware processing. This arrangement allows rapid application prototyping in the software, followed by further shifting of the timing critical parts of the processing to the hardware accelerator. The concept is proposed with the scalability in mind, therefore it is suitable for different FPGA based platforms ranging from embedded single-chip solutions (such as Zynq or Cyclone V) to high-speed backbone network monitoring boxes. Our pilot high-speed implementation using FPGA acceleration board in a commodity server performs a 100 Gb/s flow traffic measurement augmented by a selected application protocol analysis.

Towards high-performance packet processing on commodity multi-cores: current issues and future directions

“…The monitoring tasks in the software control the level of detail and type of information retained during the hardware processing. This optimization allows rapid application prototyping in the software, followed by further shifting of the timing critical parts of the processing to the hardware accelerator [9].…”

“…Not only can it meet the demands of Internet processing requirement, but also reduce power consumption. Jan [9] focused on an optimization of a flexible flow-based network traffic monitor which supports application protocol analysis. This method is called Software Defined Monitoring (SDM), which relies on a configurable hardware accelerator implemented in FPGA, and is coupled with smart monitoring tasks running as in software on a general CPU.…”

Real-time pre-processing system with hardware accelerator for mobile core networks

“…It can be adjusted according to different platform requirements, not only to satisfy high-speed Internet traffic processing needs, but also to reduce energy consumption. Kekely et al (2014) proposed an optimization method called software defined monitoring (SDM), which is based on a configurable hardware accelerator implemented in FPGA and some smart monitoring tasks running as software on a general CPU. SDM is an optimization of a flexible flow-based network traffic monitor that supports application protocol analysis.…”

“…However, the size of the cluster will be very large and incur greater costs when transmission speeds are improved. Although many researchers focus on the optimization of the packet capture engine through software-based solutions (Vasiliadis et al, 2011;Rizzo, 2012;Cisco Systems, Inc., 2013) or hardware acceleration (Han et al, 2010;Intel Products, Inc., 2010;Peemen et al, 2013;Kekely et al, 2014), these approaches are still limited to only a few common protocols (e.g., HTTP) and cannot satisfy the requirements of mobile networks.…”

Reconfigurable computing for network function virtualization: A protocol independent switch

“…A high performance FPGA-based OpenFlow switch is reported in [8]. An FPGA-based network monitoring accelerator is demonstrated in [9]. All these papers show that FPGA is able to perform as a flexible and reconfigurable platform to deliver high performance network functions.…”