2018
DOI: 10.1145/3267419.3267423
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Traffic-aware reconfigurable architecture for fault-tolerant 2D mesh NoCs

Abstract: With the aggressive scaling of the VLSI technology, Networkson-Chip (NoCs) are becoming more susceptible to faults. Therefore, designing reliable and efficient NoCs is of significant importance. The rerouting approach which is employed in most of the fault-tolerant methods causes the network performance to degrade considerably due to taking longer paths and creating hotspots around the faults. Moreover, they cannot adapt to the dynamic traffic distribution in the network. Considering the increasing demands for… Show more

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Cited by 3 publications
(2 citation statements)
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“…When the congestion is removed, it sends the information to the desired router; thus, it prevents packet destruction and improves the system's output. Moreover, Bahrebar et al 29 used a dynamically reconfigurable technique, which creates a fault‐tolerant system using the shortest path routing. The routers frequently contact each other to detect a router's failure.…”
Section: Related Workmentioning
confidence: 99%
“…When the congestion is removed, it sends the information to the desired router; thus, it prevents packet destruction and improves the system's output. Moreover, Bahrebar et al 29 used a dynamically reconfigurable technique, which creates a fault‐tolerant system using the shortest path routing. The routers frequently contact each other to detect a router's failure.…”
Section: Related Workmentioning
confidence: 99%
“…This fault tolerant architecture reduced latency and improved reliability as compared to normal mesh. The authors in [75] presented a reconfigurable fault tolerant technique for bypassing faulty routers. It modified the router structure and used Dynamic XY (DyXY) routing which makes it robust for deadlock and livelock also.…”
Section: Fault Tolerance and Reliabilitymentioning
confidence: 99%