Transient Response Enhancement with Fast Transient Controller for Capacitor-Less LDO Regulator

Sheng, Shang; Hu, Wei; Fan, Ming; Xu, Yu Sen; Chen, Guo Lin

doi:10.4028/www.scientific.net/amm.543-547.800

Cited by 3 publications

(8 citation statements)

References 8 publications

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“…It follows that the frequency characteristics of the current transfer ratio, T i , are set mainly by the dominant pole given by the equivalent resistance, R g , and the parasitic capacitance, C g , seen at the Mpass gate: (10) in which R g3,4B = R0 (g m3,4 A r ds3,4 A )k R r ds1,2B . The loop gain of the LDO can now be derived by combining T i and T v according to (7).…”

Section: Analysis Of T L D Omentioning

confidence: 99%

“…Adaptive biasing of the push-pull amplifier was employed in [8] to further improve the LDO proposed in [5]. The transient performance of the resulting LDO was comparable with the one reported in [7], but at the cost of increasing the minimum load current necessary to ensure the LDO stability.…”

mentioning

confidence: 92%

“…However, the load capacitance range was limited to 0-100pF. Two important changes to the LDO proposed in [5] were introduced in [7]: a simple NMOS buffer was used to drive the input stage of the push-pull amplifier and the resistors within the LCMFB circuit were replaced NMOS transistors driven by fast comparators that monitor the output voltage. These changes improved significantly the LDO response to fast load and line transients in comparison to [5], but the load capacitance range was not enlarged.…”

mentioning

confidence: 99%

See 2 more Smart Citations

LDO With Improved Common Gate Class-AB OTA Handles any Load Capacitors and Provides Fast Response to Load Transients

Răducan

Grajdeanu

Plesa

et al. 2020

IEEE Trans. Circuits Syst. I

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This article proposes an LDO with fast response to load transients that can handle any practical capacitive loads. These features are mainly due to a novel frequency compensation circuit tailored for its error amplifier, which is based on an improved version of the popular common gate amplifier. A simple yet effective approach to the small-signal analysis of LDO with multiple feedback loops is employed to analyse intuitively the LDO and derive key design constraints. Simulation and measurement results performed on a test chip implemented in standard 130nm CMOS process validated the proposed LDO. It requires only 0.7µA quiescent current but exhibits an excellent response to load transients: when the load current jumps from 0A to 100mA in 1µs the output voltage presents an undershoot of 76mV and an overshoot of 198mV, without decoupling capacitors. It compares well against seven LDOs designed with common gate error amplifiers for similar levels of supply voltage, output voltage and current and against seven fast LDOs employing different error amplifiers. A figureof-merit that considers the quiescent current, the maximum load current and capacitance, as well as the output voltage deviation, yielded a value for our LDO 39.8 times better than for the nearer competitor that employs common gate amplifier and 6 times better than the one employing a different error amplifier. When considering edge time and process scaling the performance of the proposed LDO is 4.8, respectively 4.5, times better than the second best in both comparisons.

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Section: Analysis Of T L D Omentioning

confidence: 99%

mentioning

confidence: 92%

mentioning

confidence: 99%

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LDO With Improved Common Gate Class-AB OTA Handles any Load Capacitors and Provides Fast Response to Load Transients

Răducan

Grajdeanu

Plesa

et al. 2020

IEEE Trans. Circuits Syst. I

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“…A popular error amplifier (EA) employed in fast LDO designs for its excellent dynamic behavior is the class-AB common-gate EA proposed in [4]. The topology was further improved by employing recycling techniques [5][6][7][8][9][10], local common-mode feedback [7,[10][11][12][13], and by a more efficient frequency compensation circuit [10]. Despite its speed, the class-AB input EA is not a suitable candidate for the application envisaged here due to its large offset voltage, caused by inherent mismatches within the input stage.…”

Section: Logicmentioning

confidence: 99%

“…Equation (12) indicates the need for the to have a wide bandwidth, that is, for the unity gain angular frequency, , to have a large value.…”

Section: Ldo Requirements and Design Strategymentioning

confidence: 99%

High-Precision Low-Temperature Drift LDO Regulator Tailored for Time-Domain Temperature Sensors

Răducan

Grăjdeanu

Ţopa

et al. 2022

Sensors

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This paper proposes a high-precision LDO with low-temperature drift suitable for sensitive time-domain temperature sensors. Its topology is based on multiple feedback loops and a novel approach to frequency compensation, that allows the LDO to maintain a large DC gain while handling capacitive loads that vary over a wide range. The key design constraints are derived by using a simplified, yet intuitive and effective, small-signal analysis devised for LDOs with multiple feedback loops. Simulation and measurement results are presented for implementation in a standard 130 nm CMOS process: the LDO outputs a stable 1 V voltage, when the input voltage varies between 1.25 V to 1.5 V, the load current between 0 and 100 mA, and the load capacitor between zero and 400 pF. It exhibits a DC load regulation of 1 µV/mA, a 288 µV output offset with a standard deviation of 9.5 mV. A key feature for the envisaged application is the very low thermal drift of the output offset: only 14.4 mV across the temperature range of −40 °C to +150 °C. Overall, the LDO output voltage stays within +/−3.5% of the nominal DC value over the entire line voltage, load, and temperature ranges, without trimming. The LDO requires only 1.4µA quiescent current, yet it provides excellent responses to load transients. The output voltage undershoot and overshoot caused by the load current jumping between 0 and 100 mA in 1 µs are: 10%/22% for CL = 0 and 12%/16% for CL = 400 pF, respectively. A comparative analysis against seven LDOs published in the last decade, designed for similar levels of supply voltage and output voltage and current, shows that the LDO presented here is the best option for supplying sensitive time-domain temperature sensors. The smallest thermal drift of the output offset, smaller than +/−15 mV, that is, 6.7 times smaller than its closest competitor, and the best overall performance when PSR up to 1 kHz, was considered.

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Design of a Digital Control Fast Response Linear Regulator

Wang,

Chen,

Zhang

et al. 2024

2024 43rd Chinese Control Conference (CCC)

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Transient Response Enhancement with Fast Transient Controller for Capacitor-Less LDO Regulator

Cited by 3 publications

References 8 publications

LDO With Improved Common Gate Class-AB OTA Handles any Load Capacitors and Provides Fast Response to Load Transients

LDO With Improved Common Gate Class-AB OTA Handles any Load Capacitors and Provides Fast Response to Load Transients

High-Precision Low-Temperature Drift LDO Regulator Tailored for Time-Domain Temperature Sensors

Design of a Digital Control Fast Response Linear Regulator

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