Transparent code authentication at the processor level

Durahim, Ahmet Onur; Savaş, Erkay; Sunar, Berk; Pedersen, Thomas; Kocabaş, Övünç

doi:10.1049/iet-cdt.2007.0122

Cited by 2 publications

(3 citation statements)

References 26 publications

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“…They benefit all block cipher algorithms that utilize relatively small sboxes such as DES/3DES, AES (Rijndael), Serpent, Twofish. Only instruction that may be considered as specific to AES is (shlmod std, sts, arx) that can perform four simultaneous shift left operations by one bit in binary extension field GF (2 8 crx [15] crx[0] crx [1] . .…”

Section: Architectural Enhancements Allowing Protected Execution Of Aesmentioning

confidence: 99%

“…. [3]) and std := (0,std [3],std [2],std [1]) mv_sout2st mv_sout2st std std := (sout,std [3],std [2],std [1]) mv_cr2st mv_cr2st std, crs std := index_0∧(crs [3],crs [2],crs [1],crs[0]) ⊕ index_1∧(crs [7],crs [6],crs [5],crs [4]) ⊕ index_2∧(crs [11],crs [10],crs [9],crs [8]) ⊕ index_3∧(crs [15],crs [14],crs [13],crs [12]) work in is p(x) = x 8 + r(x) then the architectural register (arx) in the instruction is initialized to r(x). For instance, the irreducible polynomial of GF (2 8 ) used in AES is x 8 + x 4 + x 3 + x + 1 and therefore (arx := 0x1B).…”

Section: -Bitmentioning

confidence: 99%

“…input and global variables, configuration parameters). This final requirement can be fulfilled by a lightweight dynamic authentication scheme for static data and instructions of the program [15].…”

Section: A Note On the Trusted/authenticated Code Executionmentioning

confidence: 99%

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Efficient, secure, and isolated execution of cryptographic algorithms on a cryptographic unit

Yumbul

Savaş

2009

Proceedings of the 2nd International Conference on Security of Information and Networks - SIN '09

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Cryptographic algorithms handle sensitive information and their safe execution plays an essential role in many security applications. When implemented in software on generalpurpose computers, cryptographic algorithms are vulnerable to a variety of attacks such as side-channel and cold-boot attacks since they either share hardware resources with other simultaneously executing processes or store sensitive information in easily accessible places (e.g. main memory). In this paper, we demonstrate that secure and isolated execution of cryptographic algorithms is possible on a cryptographic unit that can easily be integrated to all RISC processors. The cryptographic unit is capable of physically isolating the execution of cryptographic algorithms from all other simultaneously executing processes. By specifically providing an AES implementation running in this isolated execution environment we demonstrate that it is possible to provide physical process isolation for cryptographic algorithms without any significant overhead in execution time. Furthermore, the proposed technique protects the cryptographic applications against cold-boot and cache attacks as well as any other threats originated from other processes since the sensitive material never leave the cryptographic unit. We realized a RISC-based embedded processor with five-stage pipeline featuring the cryptographic unit on an FPGA device. We included the implementation results both for FPGA and ASIC realizations.

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Section: Architectural Enhancements Allowing Protected Execution Of Aesmentioning

confidence: 99%