2014 IEEE 6th International Memory Workshop (IMW) 2014
DOI: 10.1109/imw.2014.6849380
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Trapping-free string select transistors and ground select transistors for Vg-type 3D NAND Flash memory

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“…Moreover, it might be possible to implement V TH adjustments of the select transistors by special algorithms. Because the use of negative voltages complicates the decoding of the control lines, the use of charge-trapping free gate dielectric has been proposed [29]. Charge trapping free dielectric can be realized by removing the trapping oxide (O3) in the BE-SONOS Stack (O1/N/O2/N/O3) and replacing it with an additional oxide (O4) to reinforce the gate dielectric.…”
Section: Key Architectural Considerations For Vg-type 3d Nandmentioning
confidence: 99%
“…Moreover, it might be possible to implement V TH adjustments of the select transistors by special algorithms. Because the use of negative voltages complicates the decoding of the control lines, the use of charge-trapping free gate dielectric has been proposed [29]. Charge trapping free dielectric can be realized by removing the trapping oxide (O3) in the BE-SONOS Stack (O1/N/O2/N/O3) and replacing it with an additional oxide (O4) to reinforce the gate dielectric.…”
Section: Key Architectural Considerations For Vg-type 3d Nandmentioning
confidence: 99%