Proceedings of the 2014 International Workshop on Network on Chip Architectures 2014
DOI: 10.1145/2685342.2685346
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Tree-Mesh Heterogeneous Topology for Low-Latency NoC

Abstract: Tree-Mesh Heterogeneous Topology forLow-Latency NoC SUNGJU HAN DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING COLLEGE OF ENGINEERING SEOUL NATIONAL UNIVERSITYIn Network-on-Chip (NoC), topology is one of the most important design choices that determine performance and power consumption. Mesh, being the most popular NoC topology for many researches and products, is mainly tailored towards high throughput. However, many researches show that NoCs rarely operate under heavy load and that latency is often much mo… Show more

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Cited by 7 publications
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“…It also reduces design complexity and latency. A new heterogeneous topology for achieving low latency and high throughput was proposed in [65]. They combined tree and mesh topology Fig.…”
Section: Performancementioning
confidence: 99%
“…It also reduces design complexity and latency. A new heterogeneous topology for achieving low latency and high throughput was proposed in [65]. They combined tree and mesh topology Fig.…”
Section: Performancementioning
confidence: 99%