Trends and Challenges in Si and Hetero-Junction Tunnel Field Effect Transistors

Abstract

This paper gives an overview of the different trends and challenges of fully Si-based and hetero-junction tunnel field effect transistors (TFETs). The different horizontal and vertical approaches are discussed in view of processing aspects and device performance. A benchmarking is given of the state-of-the-art experimental data reported in the literature, enabling to highlight the potentials of these emerging devices.

(Invited) Advanced Semiconductor Devices for Future CMOS Technologies

“…TFETs can be realized using either a horizontal or vertical technology based on a planar, double gate or MuGFET approach. A benchmarking exercise till 2011 is given in (39). Each of these structures has advantages and drawbacks from a viewpoint of process complexity, achievable packing density, and a possible implementation of heterostructures to tune the band gap to increase the tunneling efficiency.…”

(Invited) Low Frequency Noise Performance of State-of-the-Art and Emerging CMOS Devices

“…To further enhance the electrical performance and/or reduce the power consumption one can switch over to another operating principle of the devices. Presently much research is focusing on tunnelFETs, based on tunneling instead of thermionic emission and characterized by a very low substhreshold swing (< 60 mV/dec) (4)(5). Another exciting research field is carbon-based electronics using carbon nanotubes (CNT) and/or graphene nanoribbons (GNR) (6)(7).…”

Estudo de transistores de tunelamento controlados por efeito de campo.

“…Enquanto isso, a corrente de recombinação prevista por Schockley-ReadHall, também explicada teoricamente em 2.2, é modelada conforme (3)(4)(5)(6).…”

“…Finalmente, o modelamento da corrente de tunelamento induzido por armadilhas (TRAP.TUNNEL) é implementado matematicamente por uma correção do modelo SRH, conforme a equação (3)(4)(5)(6)(7)(8).…”