TRIO: a Novel 10T Ternary SRAM Cell for Area-Efficient In-memory Computing of Ternary Neural Networks

Nguyen, Thanh-Dat; Le, Minh-Son; Pham, Thi-Nhan; Chang, Ik-Joon

doi:10.1109/aicas57966.2023.10168596

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TRIO: a Novel 10T Ternary SRAM Cell for Area-Efficient In-memory Computing of Ternary Neural Networks

Cited by 2 publications

References 5 publications

Comparative Evaluation of 6T, 8T and 10T Ternary SRAM Cells Schemes for Future VLSI and Power Electronics

Comparative Evaluation of 6T, 8T and 10T Ternary SRAM Cells Schemes for Future VLSI and Power Electronics

TA-Quatro: Soft Error-Resilient and Power-Efficient SRAM Cell for ADC-Less Binary Weight and Ternary Activation In-Memory Computing

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