2005
DOI: 10.1007/11573036_56
|View full text |Cite
|
Sign up to set email alerts
|

TSIC: Thermal Scheduling Simulator for Chip Multiprocessors

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1
1
1

Citation Types

0
8
0

Year Published

2006
2006
2015
2015

Publication Types

Select...
4
3

Relationship

1
6

Authors

Journals

citations
Cited by 12 publications
(8 citation statements)
references
References 9 publications
0
8
0
Order By: Relevance
“…A design of a thermal-aware scheduler has been recently proposed. (12,13) In an extreme case, cores may be shut down altogether (14) in order to cool down a certain area or the overall chip. Notice that even in the extreme case, the user would not be dramatically affected as applications will still execute normally but on a smaller number of cores.…”
Section: Chip Multiprocessormentioning
confidence: 99%
“…A design of a thermal-aware scheduler has been recently proposed. (12,13) In an extreme case, cores may be shut down altogether (14) in order to cool down a certain area or the overall chip. Notice that even in the extreme case, the user would not be dramatically affected as applications will still execute normally but on a smaller number of cores.…”
Section: Chip Multiprocessormentioning
confidence: 99%
“…From an engineering perspective, knowledge of a surface geometry that maximizes the transport rate offers opportunities for new designs that exhibit enhanced characteristics and properties. For example, the problem of transport across an uneven surface, described in the preceding paragraph, is relevant to a variety of engineering applications involving heat transfer across rough and irregular boundaries, such as the surface of a circuit board in microelectronics [22,23,24,25]. In general, heat transfer in slab-like configurations is of interest to problems associated with Heat Transport from Extended Surfaces (Fins) [8] and inverted high conductivity fins/inserts [26].…”
Section: Introductionmentioning
confidence: 99%
“…• Techniques such as, TSIC [65], TEMPEST [60] and PDTM [71] use an empirical thermal model to simulate the heat exchange between adjacent cores.…”
Section: Discussionmentioning
confidence: 99%
“…where is the thermal capacitance of node , is node temperature as a function of the time , denotes the instantaneous power input at node , ℎ is the set of all The model proposed in [65] improves the computation efficiency for temperature evaluation so as to be applicable for the online scenario. However, the model uses a time-driven approach which is only suitable for small-interval updates, using very fine granularity scheduling.…”
Section: Power/thermal Modelmentioning
confidence: 99%
See 1 more Smart Citation