TSPC STC-DET Flip-Flop With Autogated Clock Gating For Low-Power

Nadaf, Nazir; Agrawal, Sonali

doi:10.1109/iceca63461.2024.10800954

2024 8th International Conference on Electronics, Communication and Aerospace Technology (ICECA) 2024

DOI: 10.1109/iceca63461.2024.10800954

|View full text |Cite

TSPC STC-DET Flip-Flop With Autogated Clock Gating For Low-Power

Nazir Nadaf,

Sonali Agrawal

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

Supporting

Mentioning

Contrasting

Publication Types

Select...

Relationship

Self Cite0

Independent0

Authors

Journals

Cited by 0 publications

References 10 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

No citations

Set email alert for when this publication receives citations?

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

customersupport@researchsolutions.com

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Made with 💙 for researchers

Part of the Research Solutions Family.

TSPC STC-DET Flip-Flop With Autogated Clock Gating For Low-Power

Cited by 0 publications

References 10 publications

No citations

Contact Info

Product

Resources

About