Tunability of Parasitic Channel in Gate-All-Around Stacked Nanosheets

Barraud, S.; Prévitali, B.; Lapras, V.; Vizioz, C.; Hartmann, Jean‐Michel; Martinie, S.; Lacord, J.; Cassé, M.; Dourthe, L.; Loup, V.; Romano, G.; Rambal, N.; Chalupa, Zdenek; Bernier, Nicolas; Audoit, G.; Jannaud, Audrey; Delaye, V.; Balan, V.; Rozeau, O.; Ernst, T.; Vinet, M.

doi:10.1109/iedm.2018.8614507

Cited by 36 publications

(19 citation statements)

References 3 publications

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“…1b). In order to enhance the device characteristics of advanced-node semiconductor devices (e.g., FinFETs [5] and stacked nanosheet devices [6], [7]), the exact geometry of epitaxially grown Si or SiGe is crucial.…”

Section: Introductionmentioning

confidence: 99%

The Level-Set Method for Multi-Material Wet Etching and Non-Planar Selective Epitaxy

et al. 2020

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We present numerical methods to enable accurate and robust level-set based simulation of anisotropic wet etching and non-planar epitaxy for semiconductor fabrication. These fabrication techniques are characterized by highly crystal orientation-dependent etch/growth rates, which lead to non-convex Hamiltonians in their description by the level-set equation. As a consequence, instable surface propagation may emerge, leading to unphysical results. We propose a calibration-free Stencil Lax-Friedrichs scheme and an advanced adaptive time-stepping approach, tailored to the level-set speed functions associated with anisotropic etching and epitaxy. The scheme calculates the numerical dissipation based on information about the local geometry and the nature of the etch rates/growth function, which enables an optimized tradeoff between overly rounding of sharp geometric features and stable surface propagation. Furthermore, we introduce the deposition top layer method, which allows for robust handling of multiple material regions in non-planar epitaxy simulations. Both methods are demonstrated in a prototypical implementation, which is used to validate the capability and accuracy of our approaches. In particular, two-dimensional wet etching and three-dimensional epitaxy simulations are performed and characteristic geometry parameters are compared to the ideally expected values, showing robustness and high accuracy.

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Section: Introductionmentioning

confidence: 99%

The Level-Set Method for Multi-Material Wet Etching and Non-Planar Selective Epitaxy

et al. 2020

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“…They were manufactured by CEA-LETI, with both Si channels of 9nm thickness (HFIN). The gate stack is composed of a 2nm oxide (HfO2) and a TiN and Tungsten metal [5]. Fig.…”

Section: Characteristics Of the Measured Devicesmentioning

confidence: 99%

“…Fig. 1 presents a TEM view of 2 stacked nanowires with different fin width (WFIN) [5]. The total device channel width of stacked nanowire is a sum of widths from two levels of the device.…”

Section: Characteristics Of the Measured Devicesmentioning

confidence: 99%

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Performance and Analysis of n-Type Vertically Stacked Nanowires Regarding Harmonic Distortion

Carvalho

Silva²,

Paz³

et al. 2020

JICS

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This paper studies the harmonic distortion (or non-linearity) of vertically stacked SOI nanosheets with different fin widths and channel lengths. The total harmonic distortion and third order harmonic distortion are used as figures of merit in this work. The four approaches applied verifies the correlation between the harmonic distortions and the variety of transistor’s dimensions available for analysis.

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“…They were manufactured by CEALETI, with both Si channels of 9nm thickness (HFIN). The gate stack is composed of a 2nm oxide (HfO2) and a TiN and Tungsten metal [5].…”

Section: Characteristics Of the Measured Devicesmentioning

confidence: 99%

Avaliação da distorção harmônica de nanofios transistores empilhados

Carvalho¹

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A defesa pública de dissertação foi realizada virtualmente, com a presença de todos os membros da Banca Examinadora em toda todos os membros da banca. O candidato respondeu as questões efetuadas pelos membros com sucesso. Os comentários recebidos dos membros durante a avaliação serão incorporados à dissertação, gerando um novo volume. Em sessão fechada, a Banca Examinadora deliberou pela aprovação unânime da dissertação e outorga do título de Mestre. 31 05 2021 a sua duração. A defesa foi iniciada com a apresentação da dissertação pelo candidato. Em seguida, ocorreu a arguição por Palavras-chave: Nanofios empilhados. Distorção harmônica. Amplificadores operacionais. Porta circundante. Porta tripla. Tecnologia SOI.

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Tunability of Parasitic Channel in Gate-All-Around Stacked Nanosheets

Cited by 36 publications

References 3 publications

The Level-Set Method for Multi-Material Wet Etching and Non-Planar Selective Epitaxy

The Level-Set Method for Multi-Material Wet Etching and Non-Planar Selective Epitaxy

Performance and Analysis of n-Type Vertically Stacked Nanowires Regarding Harmonic Distortion

Avaliação da distorção harmônica de nanofios transistores empilhados

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