Tunnel charge transport within silicon in reversely-biased MOS tunnel structures

Performance Enhancement in Multi Gate Tunneling Field Effect Transistors by Scaling the Fin-Width

“…This device has the potential of achieving sub-60 mV/dec subthreshold swing (SS) and extremely low off current (I off ) because its carrier injection is no longer limited by carrier diffusion. [2][3][4][5][6] For this reason the tunneling field effect transistor (TFET) represents a good candidate for low standby power technology (LSPT). 7) In spite of the optimistic prospective of the theory and the increasing number of publications about simulation results, [8][9][10][11] the fabrication of TFETs presents a series of challenges regarding the steepness of the junction profile, the required doping level and the implementation of p-and n-type doping on the same device.…”

Carrier Storage in Ge Nanocrystals Grown on Silicon Oxide by a Two Step Dewetting / Nucleation Process

“…Let us now explain this resonant tunnelling current. It is well known that in tunnelling resonance, electrons accumulate between double barriers (Goldman et al, 1987;Kim, 1998, Kareva et al, 2002Vexler et al, 2006). In the case of our sample, electrons can temporarily accumulate at the Si/SiO 2 interface quantum well and between the double barrier formed by Ge-NCs, a-Si, and oxide.…”

Simulation of current–voltage characteristics of a MOS structure considering the tunnel transport of carriers in semiconductor

“…Along with the reduction of planar dimensions of field-effect transistors and of the gate insulator thickness, the aggressive scaling in modern electronics demands an enhanced substrate dopant concentration [1,2]. Consequently, the depleted area of silicon (Si) adjacent to the insulator (SiO 2 ) may become permeable for a tunnel transport of carriers [3,4]. In this case, as well as that of an accumulated surface, the tunnelling within Si (figure 1) needs to be taken into account in modelling the current through the MOS structure.…”

“…Some interesting features relying on the effect of a 'double' (in Si and through SiO 2 ) tunnelling have been analysed in [4] for the reverse-biased Al/SiO 2 /p-Si diode structure. Namely, the occurrence of a band-to-band tunnelling and the possibility of a resonant electron transport from the Si valence band into the metal, via the discrete levels in a quantum well formed in the conduction band of Si were demonstrated.…”

“…One should note, however, that the operating conditions of a MOS structure studied in [3,4] are very far from those where field-effect transistors are regularly exploited. Most often, the transistors are biased such that the voltage drop across the space charge region of silicon substrate is not high (the situation is close to the equilibrium, and Fermi quasilevels for electrons and holes are the same: E Fn = E Fp = E F ).…”