Two-Dimensional-Dirac Surface States and Bulk Gap Probed via Quantum Capacitance in a Three-Dimensional Topological Insulator

Abstract

BiSbTeSe 2 is a 3D topological insulator with Dirac type surface states and low bulk carrier density, as donors and acceptors compensate each other. Dominating low temperature surface transport in this material is heralded by Shubnikov-de Haas oscillations and the quantum Hall effect. Here, we experimentally probe the electronic density of states (DOS) in thin layers of BiSbTeSe 2 by capacitance experiments both without and in quantizing magnetic fields. By probing the lowest Landau levels, we show that a large fraction of the electrons filled via field effect into the system ends up in (localized) bulk states and appears as a background DOS. The surprisingly strong temperature dependence of such background DOS can be traced back to the Coulomb gap in the system.

Controlling and visualizing Dirac physics in topological semimetal heterostructures

“…For comparison, in the compensated 3D topological insulator BiSbTeSe 2 , the zero-B capacitance looks very similar to that shown in Fig. 2 (A and B), but the zeroth Landau level appears as a peak that develops at or very near the center of the dip feature (20,21). The same is true for graphene (22), and more broadly is an obvious consequence of Eq.…”

Disorder effects in topological insulator thin films

“…In this section, we calculate Γ(d) in the case of κ f ≫ κ. For example [10,13], a BiSbTeSe 2 (BSTS) thin film with κ f ∼ 50 can be sandwiched between two h-BN layers with κ 1,2 ∼ 5 [17]. In this case κ ∼ 5 is 10 times smaller than κ f .…”

“…Recently TI research shifted to thin TI films of thickness d in the 4-20 nm range [7][8][9][10][11][12][13]. This interest is related to observations of the inter-surface hybridization leading to the Dirac points hybridization gaps ∆(d) and related topological effects, including quantum spin Hall effect [10].…”

Opportunities in topological insulator devices

“…The independence of top and bottom surface channels mentioned above makes it difficult to attain the unique situation where the chemical potential is tuned exactly at the Dirac point, by gating the TI from either the top or the bottom side alone. To achieve full tuning to the Dirac point 12,22,23 , both sides of the TI need to be gated simultaneously, which is called "dual gating".…”

“…In this sense, oxides grown in a dry process are preferable and typically used for the back gate. For TI devices, the growth of the dielectric layer needs to be performed without heating the TI material too much, even though a high-quality gate dielectric often requires a high-temperature growth; in this regard, among the suitable materials and techniques for the fabrication of the top gate are silicon nitride grown by hot-wire CVD 24 , aluminum oxide grown by ALD 30 , and flakes of h-BN transferred onto TI flakes 23,31 .…”