Two-dimensional numerical modeling of magnetic-field sensors in CMOS technology

Nathan, Arokia; Huiser, A.M.J.; Baltes, H.

doi:10.1109/t-ed.1985.22103

Cited by 60 publications

(17 citation statements)

References 22 publications

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“…The double -drain MOS device (figure 5) is obtained from a MOSFET structure where its conventional drain region is replaced by two adjacent drain regions [6]. Consequently, the total channel current shared between this two drain regions.…”

Section: The Caracterisation Of the Double-drain Magnetotransistormentioning

confidence: 99%

Resolution capacity of Hall microsensors in MOS structures

2010

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An essential parameter in the setting up of the performance of the measurement systems that uses Hall microsensors is the detection limit of such devices. The paper presents the results of research work regarding the analysis and optimization of magnetic microsensor structures realized in bipolar and MOS integrated circuits technology. On the basis of adequate models these have been established the noise main characteristics for double collector vertical magnetotransistor and for double-drain MOSFET magnetotransistors. By using the numerical simulation the values of the signal-to-noise ratio and the detection limits for the two analysed structured are compared and it is also emphasized the way in which choosing the geometry and the material features allow getting high-performance sensors.

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Section: The Caracterisation Of the Double-drain Magnetotransistormentioning

confidence: 99%

Resolution capacity of Hall microsensors in MOS structures

2010

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“…Since the discovery of Hall device, various numerical techniques have been applied to analyze Hall device [4][5]. Although numerical models ensure the accuracy, they can hardly be implemented in standard SPICE-like EDA tools.…”

Section: Introductionmentioning

confidence: 99%

A more accurate circuit model for CMOS Hall cross with non-linear resistors and JFETs

Lyu

Zhu

et al. 2014

2014 International Symposium on Integrated Circuits (ISIC)

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We propose a more accurate model for CMOS Hall cross with resistors and JFETs. This model not only completely takes into account the physical effects, such as geometrical effects, temperature effects, parasitical effects, and so on, but also assures the symmetry of the model. And it consists of eight nonlinear resistors, four JFETs, four current-controlled voltage sources, and four reversed-biased diodes modeled by capacitors and constant-current sources. The model has been written in Verilog-A hardware description language and applied in Cadence Spectre simulator successfully. The simulation results of the model are in good agreement with the experimental results.

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“…Early work on HALL device modeling by means of analytical and numerical methods provides excellent simulation accuracy [9][10][11][12][13][14], but may hardly be implemented in lumped-circuit simulators such as SPICE [15]. Conversely, several macro-models derived recently [8,[16][17][18] perform well in EDA tools, but are hardly scalable and fail in simulating non-linear conductivity, frequency-response, noise and effects related to device dimensions such as the shape-dependent sensitivity and geometrical magnetoresistivity [19].…”

Section: Introductionmentioning

confidence: 99%