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In this paper, a new voltage-mode (VM) multifunction filter including only two grounded capacitors, three resistors, and two current feedback operational amplifiers is introduced. This filter with one high input impedance and two low output impedances can simultaneously provide band-pass filter (BPF) and low-pass filter (LPF) responses with an adjustable gain. A universal VM filter topology with three inputs and one output generating high-pass filter (HPF), BPF, LPF, notch filter, and all-pass filter (APF) responses is obtained from the multifunction one. It has the same number of active and passive elements as the multifunction and a low output impedance. Sensitivities of both introduced filters are low enough. However, the APF of the introduced universal filter has a passive element-matching problem. As an example, parasitic impedance effects are considered for the LPF of the universal filter, while non-ideal gain analyses are given for the HPF. To see how the introduced universal filter works, countless simulations are performed through the SPICE (Simulation Program with Integrated Circuit Emphasis) program in which 0.13 [Formula: see text]m IBM CMOS technology parameters are utilized. DC supply voltages are selected as ± 0.9 V. Also, several experiments using commercially available AD844s with ± 10 V supply voltages are carried out to see the performance.
In this paper, a new voltage-mode (VM) multifunction filter including only two grounded capacitors, three resistors, and two current feedback operational amplifiers is introduced. This filter with one high input impedance and two low output impedances can simultaneously provide band-pass filter (BPF) and low-pass filter (LPF) responses with an adjustable gain. A universal VM filter topology with three inputs and one output generating high-pass filter (HPF), BPF, LPF, notch filter, and all-pass filter (APF) responses is obtained from the multifunction one. It has the same number of active and passive elements as the multifunction and a low output impedance. Sensitivities of both introduced filters are low enough. However, the APF of the introduced universal filter has a passive element-matching problem. As an example, parasitic impedance effects are considered for the LPF of the universal filter, while non-ideal gain analyses are given for the HPF. To see how the introduced universal filter works, countless simulations are performed through the SPICE (Simulation Program with Integrated Circuit Emphasis) program in which 0.13 [Formula: see text]m IBM CMOS technology parameters are utilized. DC supply voltages are selected as ± 0.9 V. Also, several experiments using commercially available AD844s with ± 10 V supply voltages are carried out to see the performance.
A capacitance multiplier is an active circuit designed specifically to increase the capacitance of a passive capacitor to a significantly higher capacitance level. In this paper, the use of a voltage differencing differential difference amplifier (VDDDA), an electronically controllable active device for designing grounded and floating capacitance multipliers, is proposed. The capacitance multipliers proposed in this study are extremely simple and consist of a VDDDA, a resistor, and a capacitor. The multiplication factor (Kc) can be electronically controlled by adjusting the external bias current (IB). It offers an easy way of controlling it by utilizing a microcontroller for modern analog signal processing systems. The multiplication factor has the potential to be adjusted to a value that is either less than or greater than one, hence widening the variety of uses. The grounded capacitance multiplier can be easily transformed into a floating one by utilizing Zc-VDDDA. PSpice simulation and experimentation with a VDDDA realized from commercially available integrated circuits were used to test the performance of the proposed capacitance multipliers. The multiplication factor is electronically adjustable, ranging in approximation from 0.56 to 13.94. The operating frequency range is approximately three frequency decades. The realization of the lagging and leading phase shifters using the proposed capacitance multiplier is also examined and proven. The results reveal that the lagging and leading phase shifts are electronically tuned via the multiplication factor of the proposed capacitance multipliers.
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