Ultra-compact on-chip silicon photonics isolator using modified genetic algorithm

Abstract

The directional optical transmission characteristics of on-chip integrated optical isolators have wide application value in fields such as optical communication and optical signal processing. At early stage, various schemes of on-chip optical isolators have been developed, such as single-crystal magneto-optical pomegranate scheme, and silicon nitride ($\mathrm{Si_3N_4}$) micro-ring resonators. However, there is still lack of compact on-chip optical isolator solutions. Here, we proposed a compact and integrated silicon optical isolator on a standard silicon on insulator (SOI) substrate, designed by intelligent algorithms and a variety of micro-nano circular vias. A modified genetic algorithm is developed and introduce a segmented design fitness function and establishes a gene library to obtain an ultra-compact optical isolator scheme with a size of only $4.2\mathrm{\mu m}\times 3\mathrm{\mu m}$. On a standard silicon on insulator substrate, a linear passive isolation scheme was achieved by etching circular holes with five different diameters such as 60nm, 120nm, 180nm, 240nm and 300nm. In TE polarization mode, the design achieved an isolation degree of approximately 31dB and an insertion loss of approximately 2dB. Furthermore, in TM polarization mode, the design achieved an isolation degree of approximately 38dB and an insertion loss of 2dB; Finally, the impact of different size groups on the performance of isolators was analyzed. Results show that the smaller circular hole structure, the better isolation performance. However, at the same time, we also need to consider the real silicon etching process requirements. Too small holes are difficult to etch in practice. We also evaluated the effect of 10nm, 20nm and 30nm etch penetration between circular vias on the isolator performance, and results tentatively show that the etch penetration caused by the current more mature 30nm etching process is acceptable. Therefore, considering all factors, a 30nm minimum circular hole size and 30nm minimum distance adjacent circular hole spacing are recommended. These results have a promoting effect on the development of highly integrated and ultra-small on-chip optical signal directional transmission schemes.