Ultra-low power 0.45 mW 2.4 GHz CMOS low noise amplifier for wireless sensor networks using 0.13-m technology

Abstract

This paper describes the design topology of a ultra-low power low noise amplifier (LNA) for wireless sensor network (WSN) application. The proposed design of ultra-low power 2.4 GHz CMOS LNA is implemented using 0.13-μm Silterra technology. The LNA benefits of low power from forward body bias technique for first and second stages. Two stages are implemented in order to enhance the gain while obtaining low power consumption for overall circuit. The simulation results show that the total power consumed is only 0.45 mW at low supply voltage of 0.55 V. The power consumption is decreased about 36% as compared with the previous work. A gain of 15.1 dB, noise figure (NF) of 5.9 dB and input third order intercept point (IIP3) of -2 dBm are achieved. The input return loss (S11) and the output return loss (S22) is -17.6 dB and -12.3 dB, respectively. Meanwhile, the calculated figure of merit (FOM) is 7.19 mW-1.

Blocker tolerant cascode LNA for Wifi & IoT applications

“…Ensuring stability over a range of temperatures is essential. Accurately recognizing and characterizing all sources of noise, which encompass thermal, shot, and flicker noise, holds paramount importance in achieving a minimized NF 9 …”

“…Accurately recognizing and characterizing all sources of noise, which encompass thermal, shot, and flicker noise, holds paramount importance in achieving a minimized NF. 9 Generally, the composite signal reaching the amplifier's input encompasses not solely the transmission from the source but also unavoidably incorporates noise generated within the antenna's internal resistance. To achieve a satisfactory elevation of signal power while maintaining a rational S/N at the LNA's output, it is essential to minimize the inherent noise generated within the amplifier.…”

“…Despite their impressive performance, there has been limited research focused on defining and reaching the fundamental power consumption limits for these amplifiers. As a result, standard cryogenic LNAs currently demand a minimum of 4 mW of direct current (dc) power to operate at intended levels 7 to 9,10 . The maximum power that cryogenic electronic systems can utilize is essentially restricted by the cooling system's capacity to remove heat.…”

“…As a result, standard cryogenic LNAs currently demand a minimum of 4 mW of direct current (dc) power to operate at intended levels 7 to. 9,10 The maximum power that cryogenic electronic systems can utilize is essentially restricted by the cooling system's capacity to remove heat. For conventional closedcycle cooling systems, these capacities range from several hundred microwatts at a physical temperature of 100 mK, 11 up to 1.5 watts at a physical temperature of 4.2 K, 12,13 and 12 watts at a physical temperature of 20 K. 14,15 Presently, the power dissipation of available cryogenic LNAs poses substantial challenges when designing systems for emerging applications.…”