Ultra-low-temperature low-ohmic contacts for SOA applications

Nanver, L.K.; Zeijl, H.W. van; Schellevis, H.; Mallée, Rainer; Slabbekoorn, John; Dekker, R.; Slotboom, J.W.

doi:10.1109/bipol.1999.803544

Cited by 13 publications

(8 citation statements)

References 4 publications

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“…Bond pad areas may be opened by either dry or wet etching. More elaborate forms of substrate transfer, which take advantage of the possibility to process the devices from the backside as well, have been developed by Nanver et al [19]. Their process requires fine pitch lithography on the circuit layer after substrate transfer.…”

Section: Processing Proceduresmentioning

confidence: 99%

“…It enables the integration of high-quality passives, a maximum reduction of cross-talk and parasitic capacitances. At the same time it opens the way to double-sided device processing [19], [20] and new wafer-scale device packaging concepts (this paper, [21], and [22]). Since it is a post-processing step, it is straightforwardly implemented on existing production lines.…”

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confidence: 99%

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Substrate transfer for RF technologies

Dekker

Baltus

Maas

2003

IEEE Trans. Electron Devices

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Abstract-The constant pressure on performance improvement in RF processes is aimed at higher frequencies, less power consumption, and a higher integration level of high quality passives with digital active devices. Although excellent for the fabrication of active devices, it is the silicon substrate as a carrier that is blocking breakthroughs. Since all devices on a silicon wafer have a capacitive coupling to the resistive substrate, this results in a dissipation of RF energy, poor quality passives, cross-talk, and injection of thermal noise. We have developed a low-cost wafer-scale post-processing technology for transferring circuits, fabricated with standard IC processing, to an alternative substrate, e.g., glass. This technique comprises the gluing of a fully processed wafer, top down, to an alternative carrier followed by either partial or complete removal of the original silicon substrate. This effectively removes the drawbacks of silicon as a circuit carrier and enables the integration of high-quality passive components and eliminates cross-talk between circuit parts. A considerable development effort has brought this technology to a production-ready level of maturity. Batch-to-batch production equipment is now available and the technology and know-how are being licensed. In this paper, we present four examples to demonstrate the versatility of substrate transfer for RF applications.

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Section: Processing Proceduresmentioning

confidence: 99%

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confidence: 99%

Substrate transfer for RF technologies

Dekker

Baltus

Maas

2003

IEEE Trans. Electron Devices

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“…Aluminum has been shown to be efficient in protecting regions that should not be modified during laser annealing. 6,8 The low implantation energy required for fabricating shallow junctions also makes the implantation profile very dependent on the state of the silicon surface prior to ion implantation. It has been demonstrated that a clean and smooth surface is essential for having good electrical characteristics of the implanted junctions annealed by ELA, which requires soft landing during reactive-ion etching (RIE) steps and native oxide removal before implanting ions.…”

Section: Methodsmentioning

confidence: 99%

“…1 Many experiments based on doping profiling and sheet resistance measurements have shown that both full-melt and laser thermal processing can result in attractive values for junction depth, abruptness, and sheet resistance. [2][3][4][5][6][7][8] Of the rapid anneal procedures investigated for future CMOS devices, excimer laser annealing (ELA) has the shortest annealing times, practically eliminating any transient-enhanced diffusion (TED) effects, and also offers benefits such as precise control of junction depth, good abruptness of the dopant profile, and high dopant activation. The depth of junctions processed by full-melt ELA can be precisely controlled by applying amorphizing ion implantation, since amorphous silicon has a lower melting temperature than crystalline silicon, and the energy density of the laser light can be adjusted to only melt the top amorphous region, thus aligning the junction depth to the amorphous/crystalline interface region.…”

Section: Introductionmentioning

confidence: 99%

Low-Complexity Full-Melt Laser-Anneal Process for Fabrication of Low-Leakage Implanted Ultrashallow Junctions

Biasotto

Gonda

Nanver

et al. 2011

Journal of Elec Materi

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Good-quality ultrashallow n + p junctions are formed using 5-keV amorphizing As + implantations followed by a single-shot excimer laser anneal for dopant activation. By using an implant that is self-aligned to the contact windows etched in an oxide isolation layer, straightforward processing of the diodes is achieved with postimplantation processing temperatures kept below 400°C. A possible source of junction leakage at the perimeter caused by dip-etch enlargement of the contact window, also confirmed by transmission electron microscopy (TEM) analysis, is identified, and diode performance is improved by increasing the junction/contact window overlap. The optimum performance in terms of low leakage, shallow junctions, and low resistivity is achieved for 30°tilted implants and by applying a thin laser-reflective aluminum layer. This work isolates the minimum requirements for achieving low-leakage diode characteristics.

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“…In this paper the electrothermal consequences of implementing a bulk-silicon bipolar NPN process in silicon-on-anything (SOA) [12], [13] substrate transfer technology are examined. Pure electrically the resulting process has many potential advantages for the integration of high-performance low-power radio frequency (RF) circuits.…”

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confidence: 99%

A Back-Wafer Contacted Silicon-On-Glass Integrated Bipolar Process—Part I: The Conflict Electrical Versus Thermal Isolation

Nanver

Nenadovic

d’Alessandro

et al. 2004

IEEE Trans. Electron Devices

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Abstract-A novel silicon-on-glass integrated bipolar technology is presented. The transfer to glass is performed by gluing and subsequent removal of the bulk silicon to a buried oxide layer. Low-ohmic collector contacts are processed on the back-wafer by implantation and dopant activation by excimer laser annealing. The improved electrical isolation with reduced collector-base capacitance, collector resistance and substrate capacitance, also provide an extremely good thermal isolation. The devices are electrothermally characterized in relationship to different heat-spreader designs by electrical measurement and nematic liquid crystal imaging. Accurate values of the temperature at thermal breakdown and thermal resistance are extracted from current-controlled Gummel plot measurements.

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Ultra-low-temperature low-ohmic contacts for SOA applications

Cited by 13 publications

References 4 publications

Substrate transfer for RF technologies

Substrate transfer for RF technologies

Low-Complexity Full-Melt Laser-Anneal Process for Fabrication of Low-Leakage Implanted Ultrashallow Junctions

A Back-Wafer Contacted Silicon-On-Glass Integrated Bipolar Process—Part I: The Conflict Electrical Versus Thermal Isolation

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