This paper proposes a new and simpler methodology to combine two transistors for high-frequency applications. By using a λ/4 transmission line to connect the drain pads of the identical transistors, the line characteristic impedance can be chosen to almost perfectly cancel out the output capacitance at the design frequency f0. When the combined network is loaded with a real impedance, the real part of the impedance seen at each of the intrinsic devices is twice the value of that load, while the imaginary part is exactly zero for one of the transistors, and depends on f0 for the other. This imaginary part is inversely proportional to f0 and becomes relatively small with high Q-factor (defined as product between optimum intrinsic load and output capacitance susceptance) devices at the frequency of operation (f0). To demonstrate the effectiveness of this methodology, a 28 GHz Doherty Power Amplifier (DPA) based on the NP15 Microwave Monolithic Integrated Circuit (MMIC) process from WIN Semiconductors, has been designed using the proposed combining method for the main and auxiliary branches. The continuous wave (CW) characterization of this amplifier shows competitive results, which are comparable with the state of the art in terms of efficiency, output power, gain and bandwidth. Over a band between 27.5 and 29.5 GHz, the obtained saturated output power is higher than 32 dBm. The power added efficiency (PAE) at 6 dB output back-off (OBO) is in the range of 21 to 24 %, while is from 24 to 34 % at saturation. The saturated gain is between 8 and 12 dB over the above mentioned band.