Ultrafast characterization of an in-plane gate transistor integrated with photoconductive switches

Ogawa, Kensuke; Allam, J.; Baynes, N. de B.; Cleaver, J. R. A.; Mishima, Tomoyoshi; Ohbu, I.

doi:10.1063/1.113245

Cited by 22 publications

(9 citation statements)

References 8 publications

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“…The simplicity of the fabrication process, as no alignment is necessary between source, drain, and gate, is also one of the advantages these devices offer. The very low capacitance demonstrated theoretically 3 and experimentally measured 4 makes this device a promising one for high speed operation. The breakdown voltages for the in‐plane p–n junction geometry are higher than for a 3D‐one because the electric field within the depletion region is almost independent of the applied voltage 5.…”

Section: Introductionmentioning

confidence: 85%

In‐plane gate transistors implanted with different channel geometries by focussed ion beam in positive mode pattern definition technique

Draghici

Diaconescu

Melnikov

et al. 2010

Physica Status Solidi (a)

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In‐plane gate (IPG) transistors with various channel geometries have been fabricated by focus ion beam implantation technique in positive pattern definition mode on GaAs/AlxGa1−xAs heterostructures. Both n‐ and p‐type channel transistors were obtained for either n‐ or p‐doped heterostructures, by implantation of the channel or the gate regions with the complementary dopant type to compensate the initial doping. The current–voltage characteristics showed that the channel can be fully controlled by a gate bias, i.e., it can be completely depleted or enhanced, but two gates are needed to control the channel. Different channel geometries were studied, the most efficient being the “Z‐shaped” one. The n‐type channel IPG transistors present source–drain currents of few hundreds of microamperes, which is two to three orders of magnitudes higher than that for the p‐type channel ones.

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Section: Introductionmentioning

confidence: 85%

In‐plane gate transistors implanted with different channel geometries by focussed ion beam in positive mode pattern definition technique

Draghici

Diaconescu

Melnikov

et al. 2010

Physica Status Solidi (a)

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“…Based on an estimation of the gate capacitance and the DC transconductance measurements, a cutoff frequency of 10 THz has been predicted [11]. In fact, DC characterization and capacitance measurement of laterally-gated transistors with gate-channel separation were the subjects of several reports [13]- [18], however, there is a lack of investigation on the RF and dynamic performance of these devices. Time-domain measurements of laterally-gated transistors with a gatechannel separation, designed for logic applications, have been reported in the literature, although the time scales are either in the range of 10 s [19]- [21], or presented in arbitrary units [22], [23].…”

Section: Introductionmentioning

confidence: 99%

On the Dynamic Performance of Laterally Gated Transistors

Nikoo

Santoruvo

Erine

et al. 2019

IEEE Electron Device Lett.

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Laterally-gated transistors have been proposed as an innovative device architecture in which a semiconducting channel is controlled by side gates. In this sense, the gate can either be in contact with the sidewalls or be separated by a gap. In the latter case, the relatively large transconductance together with the small gate capacitance offers a promising potential for future RF devices. The DC performance of these transistors has been studied in the literature, however, there is a lack of investigation on their dynamic performance. Here we show that the channel control in a laterally-gated transistor with gatechannel separation can come from either the gate electric field or the trapped carriers in the surface or bulk. The latter effect results in very slow time responses. We also show that trap states can be more dominant in degrading the dynamic performance of these devices than in planar-gate transistors. The measurement method employed in this letter can be used to determine whether the control is from the gate electric-field or trapped carriers. This study aims to clarify the related studies in the literature, and opens a way to understand and optimize and laterally-gated transistors.

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“…The underlying physics of submicron semiconductor electron devices with response times of less than a picosecond, whose measurement is beyond the capabilities of conventional electronics, can be probed by photonic sampling techniques based on femtosecond lasers and ultrafast photodetectors. An example is the work of Ogawa et al [2] who characterized an in-plane gate field-effect transistor by integrating the transistor with a metal-semiconductormetal (MSM) photodetector. Additional applications of ultrafast photodetectors include THz beam systems [3] and fast sampling oscilloscopes [4].…”

Section: Introductionmentioning

confidence: 99%

One- and two-dimensional models of the transient response of metal - semiconductor - metal photodetectors including diffraction

Wilson

Walker

1997

Semicond. Sci. Technol.

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The response of metal-semiconductor-metal photodetectors to pulsed illumination was simulated for GaAs and low temperature grown LT-GaAs detectors, using a drift-diffusion model in one and two spatial dimensions. We found that the response predicted by the one-dimensional model could be made to agree closely with that of the two-dimensional model by using a single adjustable parameter representing the distance a carrier must travel in a nonilluminated region. In the two-dimensional model, diffraction of the light around the contacts has been shown to be important for a contact separation of one micron and to reduce the photocurrent significantly. LT-GaAs was modelled with the same two-dimensional model as for GaAs, but with a recombination lifetime of 5 ps and lower carrier mobilities. Our results show that the photocurrent decreases to zero in 40 ps, whereas in bulk GaAs, with a recombination lifetime of 1 ns, there is a long lived tail in the photocurrent after 100 ps. Diffraction was shown to have similar effects for LT-GaAs as for GaAs.

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Ultrafast characterization of an in-plane gate transistor integrated with photoconductive switches

Cited by 22 publications

References 8 publications

In‐plane gate transistors implanted with different channel geometries by focussed ion beam in positive mode pattern definition technique

In‐plane gate transistors implanted with different channel geometries by focussed ion beam in positive mode pattern definition technique

On the Dynamic Performance of Laterally Gated Transistors

One- and two-dimensional models of the transient response of metal - semiconductor - metal photodetectors including diffraction

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