Ultrafast wafer alignment simulation based on thin film theory

Abstract

The shrink of semiconductor fabrication ground rule continues to follow Moore's law over the past years. However, at the 100 nfl node, the fabrication cost starts to rise rapidly. This is mainly due to the increase of complexity in the fabrication process, including the use of hard masks, planarization, resolution enhancement techniques, etc. Smaller device sizes require higher alignment tolerances. Also, higher degree of complexity makes alignment detection more difficult. For example, planarization techniques may destroy mark topography; hard masks may optically bury alignment marks; and more film layers makes the alignment signal more susceptible to process variations. Therefore, in order to achieve reliable alignment, it is absolutely critical to develop an accurate and fast simulation software that can characterize alignment performance based on the film stack structure. In this paper, we will demonstrate that we have built an extremely fast alignment signal simulator for both direct imaging and diffractive detection systems based on simple optical theory. We will demonstrate through examples using our advanced DRAM products that it is capable of accurately mapping the multi-dimensional parameter space spanned by various film thickness parameters within a short period of time, which allows both on-the-fly feedback in alignment performance and alignment optimization.

The Impact of the Use of Strongly Absorbing Etch Hard Masks and Shallow Topography to Alignment Signal Strength in 28 nm Technology Nodes and Beyond

“…For ASML's WQ simulation, as described in ref. [3], a simple scalar diffraction equation for a periodical grating (Eq. [1]) with thin film reflectivity equation that one can find in Principle of Optics [4] is enough to provide very accurate result.…”

“…It has been shown in the past [1][2][3] that alignment quality largely depends on the alignment signal quality, such as the ASML's "wafer quality", or the short form WQ. The ASML's WQ basically describes the diffracted intensity from grating-like periodical line/space like alignment marks.…”

28nm Overlay Control Improvement By Wafer Quality Enhancement and Mask Registration Control

“…In advanced semiconductor manufacturing, layer to layer overlay is a critical requirement with typical control budgets ~5 nm (Fig. 1) in 2015 showed in ITRS roadmap 1 . In order to understand the gaps between capabilities and overlay needs, a systematic approach should be taken.…”

“…In metrology point of view, overlay error can be attributed to one of 4 main components: inter-field HO (high order), metrology noise, linear APC residual and mask registration. Inter-field HO contains tool error and process induced error 1 . In our experience, metrology noise, APC, and tool error are stable.…”