Ultrathin Ni Silicides With Low Contact Resistance on Strained and Unstrained Silicon

2011 IEEE International Interconnect Technology Conference

Feste

et al. 2011

Self Cite

Nano-contacts of NiSi to n + and p + doped strained and unstrained Si nanowires (NWs) were studied. Several Ni silicide phases were found: Ni 2 Si formed under the Ni electrodes,Ni 3 Si very close to the Ni electrodes, while NiSi was observed along the Si NWs. The NiSi nanowire length decreases with increasing wire cross section A. The silicidation speed along the Si NW shows a linear relation to 1/A, indicating volume silicidation of the Si NW. Uniaxial strain seems to have no effect on the silicidation speed. Contact resistivities as low as 1.2x10 -8 •cm 2 were obtained for NiSi contacts to both, strained and unstrained Si nanowires.

Section: Resultscontrasting

confidence: 66%

NiSi nano-contacts to strained and unstrained silicon nanowires

Habicht

2011 IEEE International Interconnect Technology Conference

Feste

et al. 2011

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“…This process is known as "Implantation Into Silicide" (IIS). The silicide is epitaxial NiSi 2 formed with only 3 nm Ni [2]. All the processes were performed at fairly low temperatures with T max = 700°C.…”

Section: Fabricationmentioning

confidence: 99%

Si tunneling transistors with high on-currents and slopes of 50 mV/dec using segregation doped Nisi<inf>2</inf> tunnel junctions

Knöll

2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC)

Trellenkamp

et al. 2012

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Planar and nanowire (NW) tunneling field effect transistors (TFETs) have been fabricated on ultra thin strained and unstrained SOI with shallow doped Nickel disilicide (NiSi 2 ) source and drain (S/D) contacts. We developed a novel, self-aligned process to form the p-i-n TFETs which greatly easies their fabrication by tilted dopant implantation using the high-k/metal gate as a shadow mask and dopant segregation. Two methods of dopant segregation are compared: Dopant segregation based on the "snowplough" effect of dopants during silicidation and implantation into the silicide (IIS) followed by thermal outdiffusion. High drive currents of up to 60 µA/µm of planar p-TFETs were achieved indicating good silicide/silicon tunneling junctions. The non linear temperature dependence of the inverse subthreshold slope S indicates typical TFET behavior. Strained Si NW array n-TFETs with omega shaped HfO 2 /TiN gates showed high drive currents of 7 µA/µm @ 1V V dd and steep inverse subthreshold slopes with minimum values of 50mV/dec due to the smaller band gap of strained Si and optimized electrostatics.

“…Single crystalline CoSi 2 and NiSi 2 , which have small lattice mismatches to Si, can be realized on Si substrates using Ti interlayer mediated epitaxy 11,12 or very thin metal layers. 13 However, the epitaxial growth of ternary silicides is difficult due to the complicated reactions. Erbium germanosilicide layers in disilicide phase have been epitaxially grown on SiGe substrates.…”

mentioning

confidence: 99%

Epitaxial growth of Ni(Al)Si0.7Ge0.3 on Si0.7Ge0.3/Si(100) by Al interlayer mediated epitaxy

Zhang

Wang

Applied Physics Letters

et al. 2011

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Epitaxial growth of Ni(Al)Si0.7Ge0.3 on relaxed Si0.7Ge0.3/Si(100) substrates was achieved via an Al interlayer mediated epitaxy. After annealing, most of the Al atoms from the original 3 nm interlayer diffused toward the surface but the remaining Al atoms in the epitaxial monogermanosilicide distributed uniformly, independent of the annealing temperatures. The incorporation of Al increases the transition temperature from the Ni-rich germanosilicide phase to the monogermanosilicide phase. The reduced Ni diffusion, the increased lattice constant due to substitutional Al, and the increased thermal expansion of monogermanosilicide are assumed to be the main mechanisms enabling the epitaxial growth of the quaternary silicide.