1998
DOI: 10.1109/55.663529
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Ultrathin oxide-nitride gate dielectric MOSFET's

Abstract: The first ultrathin oxide-nitride (O-N) gate dielectrics with oxide equivalent thickness of less than 2 nm have been deposited and characterized in n-MOSFET's. The O-N gates, deposited by remote plasma-enhanced CVD, demonstrate reduced gate leakage when compared with oxides of equivalent thickness while retaining comparable drive currents.

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Cited by 68 publications
(40 citation statements)
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“…This current consists of carriers tunneling from the substrate to the oxide conduction band by FN mechanism and being trapped at the oxide-nitride interface where the carriers are promoted to the poly-Si contact by Poole-Frenkel ͑PF͒ mechanism. 12,13,17 In our devices, the current can be interpreted in a similar way, even though the FN tunneling is now assisted by the Si-nc. Figure 2͑b͒ reveals that above ϳ20 V ͑emission range͒, the current in MNOS devices can be separated in two different regimes.…”
mentioning
confidence: 57%
See 1 more Smart Citation
“…This current consists of carriers tunneling from the substrate to the oxide conduction band by FN mechanism and being trapped at the oxide-nitride interface where the carriers are promoted to the poly-Si contact by Poole-Frenkel ͑PF͒ mechanism. 12,13,17 In our devices, the current can be interpreted in a similar way, even though the FN tunneling is now assisted by the Si-nc. Figure 2͑b͒ reveals that above ϳ20 V ͑emission range͒, the current in MNOS devices can be separated in two different regimes.…”
mentioning
confidence: 57%
“…In this challenge, the addition of a thin silicon nitride ͑Si 3 N 4 ͒ layer in a typical metal nitrideoxide semiconductor ͑MNOS͒ configuration is presented as a promising solution. [12][13][14] The MNOS stack reduces the effective field in the oxide layer, lowering the current flow that, in MOS configurations, is strongly field dependent ͓Fowler-Nordheim ͑FN͔͒. 15 The additional nitride barrier hinders the gate injection without significantly affecting the injection from the substrate, thus enhancing the power efficiency, as will be demonstrated later on.…”
mentioning
confidence: 99%
“…Previous studies have also shown that a Si 3 N 4 -SRO bilayer structure improves the operation of light-emiting devices, such as a reduced leakage current, a reduced electric ield on the oxide layer, and results an improvement in eiciency and a longer device life [73][74][75][76]. In this chapter, the efect of a SRN ilm on a SRO ilm (SRN/SRO bilayers) on their optical properties is analyzed.…”
Section: Silicon-rich Nitride/silicon-rich Oxide (Srn/sro) Bilayersmentioning
confidence: 97%
“…In previous studies, it has been reported that the combination of Si 3 N 4 /SRO structure improves luminescent emission properties [73,74]. Previous studies have also shown that a Si 3 N 4 -SRO bilayer structure improves the operation of light-emiting devices, such as a reduced leakage current, a reduced electric ield on the oxide layer, and results an improvement in eiciency and a longer device life [73][74][75][76].…”
Section: Silicon-rich Nitride/silicon-rich Oxide (Srn/sro) Bilayersmentioning
confidence: 98%
“…7 In MISFET transistors with SiN x :H gate, such as those being investigated for Si devices and for III-V compound semiconductor devices, there are two issues of concern that at the present moment limit their performance: the high hydrogen content and the high density of interface states. On silicon devices, some different approaches have been explored to reduce the density of interface states to a level comparable to thermal oxides: stacked dielectric structures a͒ Author to whom correspondence should be addressed; electronic mail: imartil@fis.ucm.es such as oxide-nitride-oxide ͑O-N-O͒ 14 or oxide-nitride ͑O-N͒, 15 as well as nitrided oxide interfaces. 16 For III-V semiconductors, SiN x :H seems to be preferable both to native oxides and to CVD SiO 2 because it allows the elimination of oxygen in the processing of III-V devices, and its interface properties have been substantially improved by different techniques like, for instance, the growing of an intermediate pseudomorphic silicon interface control layer ͑ICL͒.…”
Section: Introductionmentioning
confidence: 99%