2022
DOI: 10.1016/j.triboint.2022.107547
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Undeformed chip width non-uniformity modeling and surface roughness prediction in wafer self-rotational grinding process

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Cited by 28 publications
(5 citation statements)
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“…Surface roughness is an important component of surface quality and plays a key role in machining accuracy and fatigue life [32]. Figure 6 shows the in uence of machining parameters on the surface roughness pro le R a during CG/UVAG processes.…”
Section: Ground Surface Roughnessmentioning
confidence: 99%
“…Surface roughness is an important component of surface quality and plays a key role in machining accuracy and fatigue life [32]. Figure 6 shows the in uence of machining parameters on the surface roughness pro le R a during CG/UVAG processes.…”
Section: Ground Surface Roughnessmentioning
confidence: 99%
“…Silicon is the most important substrate material for the integrated circuit (IC) industry due to its excellent material properties and abundant resource reserves. In the process of IC manufacturing, for meeting the demand for highly integrated packaging, the wafer needs to be processed for back thinning and flattening, and the ultraprecision grinding technology with diamond grinding wheels as the main tool is most widely used at present. Diamond wheel grinding mainly relies on the mechanical action of abrasives scratching, plowing, and squeezing on the wafer surface to remove material, which will inevitably produce scratches, dislocations, amorphous layers, or other damages on the surface/subsurface of the wafer. These damages usually need to be removed by chemical mechanical polishing (CMP), but the CMP process has a low material removal rate and high processing costs, which seriously affects the processing efficiency. To meet the demand for efficient and low-damage processing of silicon wafers, researchers are developing a new processing technique that combines the advantages of conventional diamond wheel grinding and CMP in recent years, which is chemo-mechanical grinding (CMG). When this technology was first proposed, CeO 2 was used as the abrasive grain and silicon as the substrate material.…”
Section: Introductionmentioning
confidence: 99%
“…For a better chip thermo-mechanical reliability, the wafer needs to be processed to a proper thickness [4]. Except the high surface accuracy and integrity [5][6][7], the process efficiency and thickness uniformity are the main requirements for wafer thinning technology. In the industrial production, ultra-precision grinding technology with the workpiece self-rotation characteristic is commonly employed as a total thickness variation (TTV) controllable thinning process with high efficiency [8].…”
Section: Introductionmentioning
confidence: 99%