Underfill and mold compound influence on PoP aging under high current and high temperature stress

Abstract

In consequence of the general densification of electronic components, the stress being submitted to the packages aggravates while the size of the internal interconnections shrinks. Against the background of an increasing reliability issue, this paper focuses on reliability aspects within PoP assemblies, submitted to high current and mechanical stress conditions. The role of underfill and molding compound (MC) on temperature management, migration phenomena and stress reduction in a ball grid array (BGA) was investigated. Therefore, thermal-electrical-mechanical finite element simulations were conducted using ANSYS ® and a model of a bump chain being common for PoP structures. With the results, migration mechanisms like electro-or thermo-induced migration in bumps were calculated.

Electro- and thermo-migration induced failure mechanisms in Package on Package

“…During previous investigations [8] the stress values in SAC305 were quite above the yield stress of 35 MPa [18]. Hence the viscoplastic behavior of the solder has to be considered to avoid unrealistic high stress values [9,16]. For the calculation of the viscoplastic deformation the ANAND model, implemented in ANSYS Ò , was used.…”

“…With elastic deformation only, it was possible identify the CTE mismatch between the ICs and the packaging materials as the main reason for the warpage of the PoP devices and the high stresses at the contact surfaces of the solder joints. In [9] also the influence of additive underfill materials on the maximum stresses and mass flux due to EM and TM was investigated. The results showed a reduction of the stress and the mass flux divergences due to EM, when a high thermal conducting underfill was used.…”

“…The results showed a reduction of the stress and the mass flux divergences due to EM, when a high thermal conducting underfill was used. Because of the high stress in [9], the viscoplastic behavior of SAC was considered in [8] and [10]. In [10] first investigations with heat sources in the mounted ICs were made.…”