Understanding Co-Running Behaviors on Integrated CPU/GPU Architectures

Zhang, Feng; Zhai, Jidong; He, Bingsheng; Zhang, Shuhao; Chen, Wenguang

doi:10.1109/tpds.2016.2586074

Cited by 79 publications

(41 citation statements)

References 23 publications

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“…where ϕ (the performance of the classifier) is a function of the minimum Fisher criterion [29,Ch. 4] and r is the inverse ratio of the number of selected features (d ) to the total number of features (d) as shown in Equation (5). λ ∈ [0, 1] is the controlling parameter which tunes the ratio of impact of two parameters ϕ and r on the function value.…”

Section: Feature Selection Approachmentioning

confidence: 99%

“…This capability poses novel challenges of how to manage concurrent kernels and how to mix them so as to achieve the best performance. There is also the issue of whether to co-run applications on the CPU and GPU or not [5]. The current CUDA API [6] bestows the complete responsibility of controlling the concurrency of kernels to the programmer.…”

Section: Introductionmentioning

confidence: 99%

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Metric Selection for GPU Kernel Classification

Shekofteh

Noori

Naghibzadeh

et al. 2018

ACM Trans. Archit. Code Optim.

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Graphics Processing Units (GPUs) are vastly used for running massively parallel programs. GPU kernels exhibit different behavior at runtime and can usually be classified in a simple form as either "compute-bound" or "memory-bound." Recent GPUs are capable of concurrently running multiple kernels, which raises the question of how to most appropriately schedule kernels to achieve higher performance. In particular, coscheduling of compute-bound and memory-bound kernels seems promising. However, its benefits as well as drawbacks must be determined along with which kernels should be selected for a concurrent execution. Classifying kernels can be performed online by instrumentation based on performance counters. This work conducts a thorough analysis of the metrics collected from various benchmarks from Rodinia and CUDA SDK. The goal is to find the minimum number of effective metrics that enables online classification of kernels with a low overhead. This study employs a wrapper-based feature selection method based on the Fisher feature selection criterion. The results of experiments show that to classify kernels with a high accuracy, only three and five metrics are sufficient on a Kepler and a Pascal GPU, respectively. The proposed method is then utilized for a runtime scheduler. The results show an average speedup of 1.18× and 1.1× compared with a serial and a random scheduler, respectively.

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Section: Feature Selection Approachmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Metric Selection for GPU Kernel Classification

Shekofteh

Noori

Naghibzadeh

et al. 2018

ACM Trans. Archit. Code Optim.

View full text Add to dashboard Cite

show abstract

“…Many-core accelerators have been used in recent years to solve computationally intensive tasks, as Fig. 1 reveals for a CPU and GPU heterogeneous system [8][9][10] . The transformation of this architecture brings a huge transformation to existing high-performance computing software in many applications, such as earth simulation, climate simulation, material simulation, and phase field simulation.…”

Section: Introductionmentioning

confidence: 99%

Heterogeneous parallel algorithm design and performance optimization for WENO on the Sunway Taihulight supercomputer

Huang

Han

Wang

et al. 2020

Tinshhua Sci. Technol.

Self Cite

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A Weighted Essentially Non-Oscillatory scheme (WENO) is a solution to hyperbolic conservation laws, suitable for solving high-density fluid interface instability with strong intermittency. These problems have a large and complex flow structure. To fully utilize the computing power of High Performance Computing (HPC) systems, it is necessary to develop specific methodologies to optimize the performance of applications based on the particular system's architecture. The Sunway TaihuLight supercomputer is currently ranked as the fastest supercomputer in the world. This article presents a heterogeneous parallel algorithm design and performance optimization of a high-order WENO on Sunway TaihuLight. We analyzed characteristics of kernel functions, and proposed an appropriate heterogeneous parallel model. We also figured out the best division strategy for computing tasks, and implemented the parallel algorithm on Sunway TaihuLight. By using access optimization, data dependency elimination, and vectorization optimization, our parallel algorithm can achieve up to 172× speedup on one single node, and additional 58× speedup on 64 nodes, with nearly linear scalability.

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“…Hence, a code symbol with availability t can be locally repaired even there are t − 1 node failures. Many recent works on LRCs focused on the study of availability-(r, t), which is the key to fault-tolerance in coding theory, system reliability and computation architecture [10][11][12]. In this paper, our works focus on single-parity LRCs with t available disjoint repairable groups (availability t ≥ 1).…”

Section: Introductionmentioning

confidence: 99%

On the Single-Parity Locally Repairable Codes with Multiple Repairable Groups

Liu

Xia

2018

Information

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Locally repairable codes (LRCs) are a new family of erasure codes used in distributed storage systems which have attracted a great deal of interest in recent years. For an [ n , k , d ] linear code, if a code symbol can be repaired by t disjoint groups of other code symbols, where each group contains at most r code symbols, it is said to have availability- ( r , t ) . Single-parity LRCs are LRCs with a constraint that each repairable group contains exactly one parity symbol. For an [ n , k , d ] single-parity LRC with availability- ( r , t ) for the information symbols (single-parity LRCs), the minimum distance satisfies d ≤ n - k - ⌈ k t / r ⌉ + t + 1 . In this paper, we focus on the study of single-parity LRCs with availability- ( r , t ) for information symbols. Based on the standard form of generator matrices, we present a novel characterization of single-parity LRCs with availability t ≥ 1 . Then, a simple and straightforward proof for the Singleton-type bound is given based on the new characterization. Some necessary conditions for optimal single-parity LRCs with availability t ≥ 1 are obtained, which might provide some guidelines for optimal coding constructions.

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Understanding Co-Running Behaviors on Integrated CPU/GPU Architectures

Cited by 79 publications

References 23 publications

Metric Selection for GPU Kernel Classification

Metric Selection for GPU Kernel Classification

Heterogeneous parallel algorithm design and performance optimization for WENO on the Sunway Taihulight supercomputer

On the Single-Parity Locally Repairable Codes with Multiple Repairable Groups

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